Re: [PATCH] MIPS: switch BMIPS5000 to use r4k_wait_irqoff()

[Florian Fainelli <f.fainelli@gmail.com>]

Le 19/10/2015 11:44, Petri Gynther a écrit :
> BCM7425 CPU Interface Zephyr Processor, pages 5-309 and 5-310
> BCM7428B0 CPU Interface Zephyr Processor, pages 5-337 and 5-338
> 
> WAIT instruction:
> Thread enters wait state. No instructions are executed until an
> interrupt occurs. The processor's clocks are stopped if both threads
> are in idle mode.
> 
> Description:
> Execution of this instruction puts the thread into wait state, an idle
> mode in which no instructions are fetched or executed. The thread remains
> in wait state until an interrupt occurs that is not masked by the
> interrupt mask field in the Status register. Then, if interrupts are
> enabled by the IE bit in the Status register, the interrupt is serviced.
> The ERET instruction returns to the instruction following the WAIT
> instruction. If interrupts are disabled, the processor resumes executing
> instructions with the next sequential instruction.
> 
> Programming notes:
> The WAIT instruction should be executed while interrupts are disabled
> by the IE bit in the Status register. This avoids a potential timing
> hazard, which occurs if an interrupt is taken between testing the counter
> and executing the WAIT instruction. In this hazard case, the interrupt
> will have been completed before the WAIT instruction is executed, so
> the processor will remain indefinitely in wait state until the next
> interrupt.
> 
> Signed-off-by: Petri Gynther <pgynther@google.com>

Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>

> ---
>  arch/mips/kernel/idle.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/mips/kernel/idle.c b/arch/mips/kernel/idle.c
> index ab1478d..d636c70 100644
> --- a/arch/mips/kernel/idle.c
> +++ b/arch/mips/kernel/idle.c
> @@ -160,7 +160,6 @@ void __init check_wait(void)
>  	case CPU_BMIPS3300:
>  	case CPU_BMIPS4350:
>  	case CPU_BMIPS4380:
> -	case CPU_BMIPS5000:
>  	case CPU_CAVIUM_OCTEON:
>  	case CPU_CAVIUM_OCTEON_PLUS:
>  	case CPU_CAVIUM_OCTEON2:
> @@ -171,7 +170,9 @@ void __init check_wait(void)
>  	case CPU_XLP:
>  		cpu_wait = r4k_wait;
>  		break;
> -
> +	case CPU_BMIPS5000:
> +		cpu_wait = r4k_wait_irqoff;
> +		break;
>  	case CPU_RM7000:
>  		cpu_wait = rm7k_wait_irqoff;
>  		break;
> 


-- 
Florian