From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mailout1.w1.samsung.com ([210.118.77.11]:51062 "EHLO mailout1.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752263AbbJTMmN (ORCPT ); Tue, 20 Oct 2015 08:42:13 -0400 Subject: Re: [PATCH 04/10] dt-bindings: video: add PCLK clock entry to exynos5433-decon To: Krzysztof Kozlowski , Inki Dae References: <1445332961-25419-1-git-send-email-a.hajda@samsung.com> <1445332961-25419-5-git-send-email-a.hajda@samsung.com> <5626327E.3050002@samsung.com> Cc: k.kozlowski.k@gmail.com, Bartlomiej Zolnierkiewicz , Marek Szyprowski , Kyungmin Park , dri-devel@lists.freedesktop.org, linux-clk@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, Kukjin Kim , Sylwester Nawrocki , Hyungwon Hwang From: Andrzej Hajda Message-id: <56263691.1080804@samsung.com> Date: Tue, 20 Oct 2015 14:41:53 +0200 MIME-version: 1.0 In-reply-to: <5626327E.3050002@samsung.com> Content-type: text/plain; charset=iso-8859-2 Sender: linux-clk-owner@vger.kernel.org List-ID: On 10/20/2015 02:24 PM, Krzysztof Kozlowski wrote: > W dniu 20.10.2015 o 18:22, Andrzej Hajda pisze: >> DECON IP requires this clock to access configuration registers. >> >> Signed-off-by: Andrzej Hajda >> --- >> Documentation/devicetree/bindings/video/exynos5433-decon.txt | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/Documentation/devicetree/bindings/video/exynos5433-decon.txt b/Documentation/devicetree/bindings/video/exynos5433-decon.txt >> index 377afbf..3dff78b 100644 >> --- a/Documentation/devicetree/bindings/video/exynos5433-decon.txt >> +++ b/Documentation/devicetree/bindings/video/exynos5433-decon.txt >> @@ -16,7 +16,7 @@ Required properties: >> - clocks: must include clock specifiers corresponding to entries in the >> clock-names property. >> - clock-names: list of clock names sorted in the same order as the clocks >> - property. Must contain "aclk_decon", "aclk_smmu_decon0x", >> + property. Must contain "pclk", "aclk_decon", "aclk_smmu_decon0x", > I assume that old DTB wouldn't work at all, so there is no point in > maintaining ABI compatibility? Yes, Exynos 5433 has not yet landed in mainline. Regards Andrzej > > Best regards, > Krzysztof > > From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrzej Hajda Subject: Re: [PATCH 04/10] dt-bindings: video: add PCLK clock entry to exynos5433-decon Date: Tue, 20 Oct 2015 14:41:53 +0200 Message-ID: <56263691.1080804@samsung.com> References: <1445332961-25419-1-git-send-email-a.hajda@samsung.com> <1445332961-25419-5-git-send-email-a.hajda@samsung.com> <5626327E.3050002@samsung.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-reply-to: <5626327E.3050002@samsung.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Krzysztof Kozlowski , Inki Dae Cc: devicetree@vger.kernel.org, linux-samsung-soc@vger.kernel.org, Bartlomiej Zolnierkiewicz , k.kozlowski.k@gmail.com, dri-devel@lists.freedesktop.org, Kyungmin Park , Kukjin Kim , Sylwester Nawrocki , linux-clk@vger.kernel.org, Marek Szyprowski List-Id: linux-samsung-soc@vger.kernel.org T24gMTAvMjAvMjAxNSAwMjoyNCBQTSwgS3J6eXN6dG9mIEtvemxvd3NraSB3cm90ZToKPiBXIGRu aXUgMjAuMTAuMjAxNSBvIDE4OjIyLCBBbmRyemVqIEhhamRhIHBpc3plOgo+PiBERUNPTiBJUCBy ZXF1aXJlcyB0aGlzIGNsb2NrIHRvIGFjY2VzcyBjb25maWd1cmF0aW9uIHJlZ2lzdGVycy4KPj4K Pj4gU2lnbmVkLW9mZi1ieTogQW5kcnplaiBIYWpkYSA8YS5oYWpkYUBzYW1zdW5nLmNvbT4KPj4g LS0tCj4+ICBEb2N1bWVudGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3MvdmlkZW8vZXh5bm9zNTQz My1kZWNvbi50eHQgfCAyICstCj4+ICAxIGZpbGUgY2hhbmdlZCwgMSBpbnNlcnRpb24oKyksIDEg ZGVsZXRpb24oLSkKPj4KPj4gZGlmZiAtLWdpdCBhL0RvY3VtZW50YXRpb24vZGV2aWNldHJlZS9i aW5kaW5ncy92aWRlby9leHlub3M1NDMzLWRlY29uLnR4dCBiL0RvY3VtZW50YXRpb24vZGV2aWNl dHJlZS9iaW5kaW5ncy92aWRlby9leHlub3M1NDMzLWRlY29uLnR4dAo+PiBpbmRleCAzNzdhZmJm Li4zZGZmNzhiIDEwMDY0NAo+PiAtLS0gYS9Eb2N1bWVudGF0aW9uL2RldmljZXRyZWUvYmluZGlu Z3MvdmlkZW8vZXh5bm9zNTQzMy1kZWNvbi50eHQKPj4gKysrIGIvRG9jdW1lbnRhdGlvbi9kZXZp Y2V0cmVlL2JpbmRpbmdzL3ZpZGVvL2V4eW5vczU0MzMtZGVjb24udHh0Cj4+IEBAIC0xNiw3ICsx Niw3IEBAIFJlcXVpcmVkIHByb3BlcnRpZXM6Cj4+ICAtIGNsb2NrczogbXVzdCBpbmNsdWRlIGNs b2NrIHNwZWNpZmllcnMgY29ycmVzcG9uZGluZyB0byBlbnRyaWVzIGluIHRoZQo+PiAgCSAgY2xv Y2stbmFtZXMgcHJvcGVydHkuCj4+ICAtIGNsb2NrLW5hbWVzOiBsaXN0IG9mIGNsb2NrIG5hbWVz IHNvcnRlZCBpbiB0aGUgc2FtZSBvcmRlciBhcyB0aGUgY2xvY2tzCj4+IC0JICAgICAgIHByb3Bl cnR5LiBNdXN0IGNvbnRhaW4gImFjbGtfZGVjb24iLCAiYWNsa19zbW11X2RlY29uMHgiLAo+PiAr CSAgICAgICBwcm9wZXJ0eS4gTXVzdCBjb250YWluICJwY2xrIiwgImFjbGtfZGVjb24iLCAiYWNs a19zbW11X2RlY29uMHgiLAo+IEkgYXNzdW1lIHRoYXQgb2xkIERUQiB3b3VsZG4ndCB3b3JrIGF0 IGFsbCwgc28gdGhlcmUgaXMgbm8gcG9pbnQgaW4KPiBtYWludGFpbmluZyBBQkkgY29tcGF0aWJp bGl0eT8KClllcywgRXh5bm9zIDU0MzMgaGFzIG5vdCB5ZXQgbGFuZGVkIGluIG1haW5saW5lLgoK UmVnYXJkcwpBbmRyemVqCgo+Cj4gQmVzdCByZWdhcmRzLAo+IEtyenlzenRvZgo+Cj4KCl9fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmRyaS1kZXZlbCBtYWls aW5nIGxpc3QKZHJpLWRldmVsQGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwOi8vbGlzdHMuZnJl ZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vZHJpLWRldmVsCg==