From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Subject: Re: [PATCH v1 2/2] ARM: dts: rockchip: Add the OTP gpio pinctrl References: <1445395380-5365-1-git-send-email-wxt@rock-chips.com> <1445395380-5365-3-git-send-email-wxt@rock-chips.com> From: Caesar Wang Message-ID: <562717CD.3040601@rock-chips.com> Date: Wed, 21 Oct 2015 12:42:53 +0800 MIME-Version: 1.0 In-Reply-To: Content-Type: multipart/alternative; boundary="------------060300010608050700010904" To: Doug Anderson Cc: Heiko Stuebner , Dmitry Torokhov , Eduardo Valentin , Russell King , "devicetree@vger.kernel.org" , Kumar Gala , "linux-kernel@vger.kernel.org" , Ian Campbell , "open list:ARM/Rockchip SoC..." , Rob Herring , Pawel Moll , Mark Rutland , "linux-arm-kernel@lists.infradead.org" List-ID: This is a multi-part message in MIME format. --------------060300010608050700010904 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Doug, 在 2015年10月21日 12:25, Doug Anderson 写道: > Caesar, > > On Tue, Oct 20, 2015 at 7:43 PM, Caesar Wang wrote: >> We need the OTP pin is gpio state before resetting the TSADC controller, >> since the tshut polarity will generate a high signal. > It might or might not be "high" depending on polarity, right? It's > just possible that it could glitch during probe. Other than that nit, > this seems fine to me. I think the description is right, maybe need other decriptions. The tshut *polarity* is low in a short period of time when the TSADC controller is reset. In other words, If T < (setting temperature), the OTP output the High Signal. ------> if the otp out polarity is high, the TSHUT will work. If T > (setting temperature), the OTP output the Low Signal. > If it's not too much trouble it'd be nice if you could spin with the > description change. Otherwise: > > Reviewed-by: Douglas Anderson > > > -- Yours, Caesar --------------060300010608050700010904 Content-Type: text/html; charset=utf-8 Content-Transfer-Encoding: 8bit Doug,

在 2015年10月21日 12:25, Doug Anderson 写道:
Caesar,

On Tue, Oct 20, 2015 at 7:43 PM, Caesar Wang <wxt@rock-chips.com> wrote:

We need the OTP pin is gpio state before resetting the TSADC controller,
since the tshut polarity will generate a high signal.

It might or might not be "high" depending on polarity, right?  It's
just possible that it could glitch during probe.  Other than that nit,
this seems fine to me.

I think the description is right,   maybe need other decriptions.
The tshut polarity is low in a short period of time when the TSADC controller is reset.

In other words,
If T < (setting temperature), the OTP output the High Signal. ------> if the otp out polarity is high, the TSHUT will work.
If T > (setting temperature), the OTP output the Low Signal.

If it's not too much trouble it'd be nice if you could spin with the
description change.  Otherwise:

Reviewed-by: Douglas Anderson <dianders@chromium.org>





-- 
Yours, 
Caesar
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