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From: Stephen Warren <swarren@wwwdotorg.org>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] ARM: tegra210: implement PLLE init procedure from TRM
Date: Wed, 21 Oct 2015 10:37:34 -0600	[thread overview]
Message-ID: <5627BF4E.9030705@wwwdotorg.org> (raw)
In-Reply-To: <1444085933-30034-1-git-send-email-swarren@wwwdotorg.org>

On 10/05/2015 04:58 PM, Stephen Warren wrote:
> From: Stephen Warren <swarren@nvidia.com>
>
> Implement the procedure that the TRM mandates to initialize PLLREFE and
> PLLE. This makes the PLL actually lock.
>
> Note that this section of the TRM is being cleaned up to remove some
> confusion. The set of register accesses in this patch should be final,
> although the step numbers/descriptions might still change.

Tom,

Is this patch OK? I assume it can be applied now the merge window is over?

      reply	other threads:[~2015-10-21 16:37 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-05 22:58 [U-Boot] [PATCH] ARM: tegra210: implement PLLE init procedure from TRM Stephen Warren
2015-10-21 16:37 ` Stephen Warren [this message]

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