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From: Akshay Bhat <akshay.bhat@timesys.com>
To: Lucas Stach <l.stach@pengutronix.de>
Cc: dri-devel@lists.freedesktop.org
Subject: Re: imx IPU2 video out
Date: Wed, 21 Oct 2015 13:47:00 -0400	[thread overview]
Message-ID: <5627CF94.5090706@timesys.com> (raw)
In-Reply-To: <1445421278.3196.4.camel@pengutronix.de>



On 10/21/2015 05:54 AM, Lucas Stach wrote:
> Am Dienstag, den 20.10.2015, 10:22 -0400 schrieb Akshay Bhat:
>> Hi,
>>
>> We are trying to use IPU2 DI0 for LVDS and IPU1 DI0 for HDMI on a iMX6Q
>> based board. Below is the ldb entry in device tree and with these
>> settings the LVDS is still being mapped to IPU1. Is there something
>> missing/incorrect in the dts entry? The board is running 4.3-rc5 kernel.
>>
> The DT includes all possible connections and you should not need to
> modify it in any way as it is describing the hardware.
>
> What IPU to use is purely a software decision. IPU1 is used by default
> with the in-kernel framebuffer emulation layer as it will pick the
> lowest possible CRTC, and thus always picks one of the IPU1 DIs. If you
> want to use something different for any reason you need to explicitly
> set a mode with a different CRTC through the KMS interface.
>
> Regards,
> Lucas

Lucas, thanks for the detailed response; it makes sense.

Pardon my ignorance but is it possible to specify a connector to use a 
different CRTC via bootargs (helps display the kernel splash screen on 
both displays)? I looked at drm_mode_parse_command_line_for_connector 
function and couldn't find an option.

Currently on our setup since LVDS and HDMI use the same IPU, there are 
clock conflicts at 1080p when setting DI frequency resulting in HDMI 
display not showing anything, hence the need to use the 2nd IPU.

>
>> &ldb {
>>           assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
>>                             <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
>>           assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
>>                                    <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
>>           fsl,dual-channel;
>>           status = "okay";
>>
>>           lvds0: lvds-channel@0 {
>>                   fsl,data-mapping = "spwg";
>>                   fsl,data-width = <24>;
>>                   status = "okay";
>>                   display-timings {
>>                           native-mode = <&timing0>;
>>                           timing0: stdp4028 {
>>                                   clock-frequency = <137143857>;
>>                                   hactive = <1920>;
>>                                   vactive = <1080>;
>>                                   hback-porch = <100>;
>>                                   hfront-porch = <40>;
>>                                   vback-porch = <30>;
>>                                   vfront-porch = <3>;
>>                                   hsync-len = <10>;
>>                                   vsync-len = <2>;
>>                           };
>>                   };
>>                   port@2 {
>>                           reg = <2>;
>>                           lvds0_in: endpoint {
>>                                   remote-endpoint = <&ipu2_di0_lvds0>;
>>                           };
>>                   };
>>           };
>> };
>>
>> I have also tried 2 other settings with the same result:
>> &ldb {
>> ..............
>>                   port {
>>                           lvds0_in: endpoint {
>>                                   remote-endpoint = <&ipu2_di0_lvds0>;
>>                           };
>>                   };
>> };
>>
>> and also:
>> &ldb {
>> ..............
>>                   port {
>>                           lvds0_in: endpoint {
>>                                   remote-endpoint = <&ipu2_di0_disp0>;
>>                           };
>>                   };
>> };
>>
>> &ipu2_di0_disp0 {
>>           remote-endpoint = <&lvds0_in>;
>> };
>>
>> If i dump the clock tree, the use count for ipu2_diX interface show ipu2
>> is not being used.
>> clock                    parent                   use      rate
>> ipu1_di0                 clk                       1  148500000
>> ipu1_di1                 clk                       1  137142857
>> ipu2_di0                 clk                       0   49500000
>> ipu2_di1                 clk                       0   49500000
>>
>> Thanks,
>> Akshay
>> _______________________________________________
>> dri-devel mailing list
>> dri-devel@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/dri-devel
>
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  reply	other threads:[~2015-10-21 17:47 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-20 14:22 imx IPU2 video out Akshay Bhat
2015-10-21  9:54 ` Lucas Stach
2015-10-21 17:47   ` Akshay Bhat [this message]
2015-10-21 18:03     ` Fabio Estevam
2015-10-21 18:41       ` Akshay Bhat

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