From mboxrd@z Thu Jan 1 00:00:00 1970 From: puck.chen@hisilicon.com (chenfeng) Date: Fri, 23 Oct 2015 17:10:31 +0800 Subject: [PATCH V2 2/3] Add iommu driver for hi6220 SoC platform In-Reply-To: <56265783.5040406@arm.com> References: <1445330724-129401-1-git-send-email-puck.chen@hisilicon.com> <1445330724-129401-2-git-send-email-puck.chen@hisilicon.com> <56265783.5040406@arm.com> Message-ID: <5629F987.3060701@hisilicon.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi Robin, On 2015/10/20 23:02, Robin Murphy wrote: > On 20/10/15 09:45, Chen Feng wrote: >> iommu/hisilicon: Add hi6220-SoC smmu driver > >> + >> +static int hi6220_smmu_attach_dev(struct iommu_domain *domain, >> + struct device *dev) >> +{ >> + dev->archdata.iommu = &iova_allocator; > > If the hardware doesn't offer any kind of device isolation (i.e. multiple translation contexts), then you should probably have more logic here to ensure only a single domain can ever be active at once. > >> + return 0; >> +} >> + I feel confused about your above comments. Could you help explain "ensure only a single domain can ever be active at once"? > Robin. > > > . > From mboxrd@z Thu Jan 1 00:00:00 1970 From: chenfeng Subject: Re: [PATCH V2 2/3] Add iommu driver for hi6220 SoC platform Date: Fri, 23 Oct 2015 17:10:31 +0800 Message-ID: <5629F987.3060701@hisilicon.com> References: <1445330724-129401-1-git-send-email-puck.chen@hisilicon.com> <1445330724-129401-2-git-send-email-puck.chen@hisilicon.com> <56265783.5040406@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <56265783.5040406-5wv7dgnIgG8@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Robin Murphy , yudongbin-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org, saberlily.xia-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org, suzhuangluan-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org, kong.kongxinwei-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org, xuyiping-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org, z.liuxinliang-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org, puck.chen-Dw/NWeUnuQfQT0dZR+AlfA@public.gmane.org, weidong2-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org, w.f-hv44wF8Li93QT0dZR+AlfA@public.gmane.org, joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org, robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, pawel.moll-5wv7dgnIgG8@public.gmane.org, mark.rutland-5wv7dgnIgG8@public.gmane.org, ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org, galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, xuwei5-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org Cc: dan.zhao-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org, peter.panshilin-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org, qijiwen-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org, linuxarm-hv44wF8Li93QT0dZR+AlfA@public.gmane.org List-Id: devicetree@vger.kernel.org Hi Robin, On 2015/10/20 23:02, Robin Murphy wrote: > On 20/10/15 09:45, Chen Feng wrote: >> iommu/hisilicon: Add hi6220-SoC smmu driver > >> + >> +static int hi6220_smmu_attach_dev(struct iommu_domain *domain, >> + struct device *dev) >> +{ >> + dev->archdata.iommu = &iova_allocator; > > If the hardware doesn't offer any kind of device isolation (i.e. multiple translation contexts), then you should probably have more logic here to ensure only a single domain can ever be active at once. > >> + return 0; >> +} >> + I feel confused about your above comments. Could you help explain "ensure only a single domain can ever be active at once"? > Robin. > > > . > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752181AbbJWJL5 (ORCPT ); Fri, 23 Oct 2015 05:11:57 -0400 Received: from szxga01-in.huawei.com ([58.251.152.64]:3951 "EHLO szxga01-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751114AbbJWJLy (ORCPT ); Fri, 23 Oct 2015 05:11:54 -0400 Subject: Re: [PATCH V2 2/3] Add iommu driver for hi6220 SoC platform To: Robin Murphy , , , , , , , , , , , , , , , , , , , References: <1445330724-129401-1-git-send-email-puck.chen@hisilicon.com> <1445330724-129401-2-git-send-email-puck.chen@hisilicon.com> <56265783.5040406@arm.com> CC: , , , From: chenfeng Message-ID: <5629F987.3060701@hisilicon.com> Date: Fri, 23 Oct 2015 17:10:31 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; rv:38.0) Gecko/20100101 Thunderbird/38.2.0 MIME-Version: 1.0 In-Reply-To: <56265783.5040406@arm.com> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.142.192.172] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Robin, On 2015/10/20 23:02, Robin Murphy wrote: > On 20/10/15 09:45, Chen Feng wrote: >> iommu/hisilicon: Add hi6220-SoC smmu driver > >> + >> +static int hi6220_smmu_attach_dev(struct iommu_domain *domain, >> + struct device *dev) >> +{ >> + dev->archdata.iommu = &iova_allocator; > > If the hardware doesn't offer any kind of device isolation (i.e. multiple translation contexts), then you should probably have more logic here to ensure only a single domain can ever be active at once. > >> + return 0; >> +} >> + I feel confused about your above comments. Could you help explain "ensure only a single domain can ever be active at once"? > Robin. > > > . >