From mboxrd@z Thu Jan 1 00:00:00 1970 From: Hanjun Guo Subject: Re: [PATCH V1 10/10] acpi, gicv3, its: Use MADT ITS subtable to do PCI/MSI domain initialization. Date: Sat, 24 Oct 2015 18:20:30 +0800 Message-ID: <562B5B6E.2000305@huawei.com> References: <1444917919-21152-1-git-send-email-tn@semihalf.com> <1444917919-21152-11-git-send-email-tn@semihalf.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1444917919-21152-11-git-send-email-tn@semihalf.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Tomasz Nowicki , marc.zyngier@arm.com, tglx@linutronix.de, jason@lakedaemon.net, rjw@rjwysocki.net, lorenzo.pieralisi@arm.com, robert.richter@caviumnetworks.com Cc: Suravee.Suthikulpanit@amd.com, graeme.gregory@linaro.org, Catalin.Marinas@arm.com, will.deacon@arm.com, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, hanjun.guo@linaro.org, ddaney.cavm@gmail.com, linux-arm-kernel@lists.infradead.org List-Id: linux-acpi@vger.kernel.org On 2015/10/15 22:05, Tomasz Nowicki wrote: > After refactoring DT code, we let ACPI to build ITS PCI MSI domain > and do requester ID to device ID translation using IORT table. > > We have now full PCI MSI domain stack, thus we can enable ITS initialization > from GICv3 core driver for ACPI scenario. > > Signed-off-by: Tomasz Nowicki > --- > drivers/irqchip/irq-gic-v3-its-pci-msi.c | 48 ++++++++++++++++++++++++++++++-- > drivers/irqchip/irq-gic-v3.c | 3 +- > 2 files changed, 47 insertions(+), 4 deletions(-) > > diff --git a/drivers/irqchip/irq-gic-v3-its-pci-msi.c b/drivers/irqchip/irq-gic-v3-its-pci-msi.c > index cfd35da..09ae2d8 100644 > --- a/drivers/irqchip/irq-gic-v3-its-pci-msi.c > +++ b/drivers/irqchip/irq-gic-v3-its-pci-msi.c > @@ -15,6 +15,8 @@ > * along with this program. If not, see . > */ > > +#include > +#include > #include > #include > #include > @@ -59,8 +61,10 @@ static int its_pci_msi_vec_count(struct pci_dev *pdev) > static int its_get_pci_alias(struct pci_dev *pdev, u16 alias, void *data) > { > struct its_pci_alias *dev_alias = data; > + u32 dev_id; > > - dev_alias->dev_id = alias; > + dev_alias->dev_id = iort_find_pci_id(pdev, alias, &dev_id) == 0 ? > + dev_id : alias; Hi tomasz, I think we need to re work this patch on top of tip/irq/core which has support for "msi-map" and "mai-parent" property support. Thanks Hanjun From mboxrd@z Thu Jan 1 00:00:00 1970 From: guohanjun@huawei.com (Hanjun Guo) Date: Sat, 24 Oct 2015 18:20:30 +0800 Subject: [PATCH V1 10/10] acpi, gicv3, its: Use MADT ITS subtable to do PCI/MSI domain initialization. In-Reply-To: <1444917919-21152-11-git-send-email-tn@semihalf.com> References: <1444917919-21152-1-git-send-email-tn@semihalf.com> <1444917919-21152-11-git-send-email-tn@semihalf.com> Message-ID: <562B5B6E.2000305@huawei.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 2015/10/15 22:05, Tomasz Nowicki wrote: > After refactoring DT code, we let ACPI to build ITS PCI MSI domain > and do requester ID to device ID translation using IORT table. > > We have now full PCI MSI domain stack, thus we can enable ITS initialization > from GICv3 core driver for ACPI scenario. > > Signed-off-by: Tomasz Nowicki > --- > drivers/irqchip/irq-gic-v3-its-pci-msi.c | 48 ++++++++++++++++++++++++++++++-- > drivers/irqchip/irq-gic-v3.c | 3 +- > 2 files changed, 47 insertions(+), 4 deletions(-) > > diff --git a/drivers/irqchip/irq-gic-v3-its-pci-msi.c b/drivers/irqchip/irq-gic-v3-its-pci-msi.c > index cfd35da..09ae2d8 100644 > --- a/drivers/irqchip/irq-gic-v3-its-pci-msi.c > +++ b/drivers/irqchip/irq-gic-v3-its-pci-msi.c > @@ -15,6 +15,8 @@ > * along with this program. If not, see . > */ > > +#include > +#include > #include > #include > #include > @@ -59,8 +61,10 @@ static int its_pci_msi_vec_count(struct pci_dev *pdev) > static int its_get_pci_alias(struct pci_dev *pdev, u16 alias, void *data) > { > struct its_pci_alias *dev_alias = data; > + u32 dev_id; > > - dev_alias->dev_id = alias; > + dev_alias->dev_id = iort_find_pci_id(pdev, alias, &dev_id) == 0 ? > + dev_id : alias; Hi tomasz, I think we need to re work this patch on top of tip/irq/core which has support for "msi-map" and "mai-parent" property support. Thanks Hanjun From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751395AbbJXKVm (ORCPT ); Sat, 24 Oct 2015 06:21:42 -0400 Received: from szxga03-in.huawei.com ([119.145.14.66]:14271 "EHLO szxga03-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750969AbbJXKVk (ORCPT ); Sat, 24 Oct 2015 06:21:40 -0400 Message-ID: <562B5B6E.2000305@huawei.com> Date: Sat, 24 Oct 2015 18:20:30 +0800 From: Hanjun Guo User-Agent: Mozilla/5.0 (Windows NT 6.1; rv:24.0) Gecko/20100101 Thunderbird/24.0.1 MIME-Version: 1.0 To: Tomasz Nowicki , , , , , , CC: , , , , , , , , Subject: Re: [PATCH V1 10/10] acpi, gicv3, its: Use MADT ITS subtable to do PCI/MSI domain initialization. References: <1444917919-21152-1-git-send-email-tn@semihalf.com> <1444917919-21152-11-git-send-email-tn@semihalf.com> In-Reply-To: <1444917919-21152-11-git-send-email-tn@semihalf.com> Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.177.17.188] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020206.562B5B75.00BB,ss=1,re=0.000,recu=0.000,reip=0.000,cl=1,cld=1,fgs=0, ip=0.0.0.0, so=2013-05-26 15:14:31, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 41c41440238e879cdb330ac3ad5deda1 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2015/10/15 22:05, Tomasz Nowicki wrote: > After refactoring DT code, we let ACPI to build ITS PCI MSI domain > and do requester ID to device ID translation using IORT table. > > We have now full PCI MSI domain stack, thus we can enable ITS initialization > from GICv3 core driver for ACPI scenario. > > Signed-off-by: Tomasz Nowicki > --- > drivers/irqchip/irq-gic-v3-its-pci-msi.c | 48 ++++++++++++++++++++++++++++++-- > drivers/irqchip/irq-gic-v3.c | 3 +- > 2 files changed, 47 insertions(+), 4 deletions(-) > > diff --git a/drivers/irqchip/irq-gic-v3-its-pci-msi.c b/drivers/irqchip/irq-gic-v3-its-pci-msi.c > index cfd35da..09ae2d8 100644 > --- a/drivers/irqchip/irq-gic-v3-its-pci-msi.c > +++ b/drivers/irqchip/irq-gic-v3-its-pci-msi.c > @@ -15,6 +15,8 @@ > * along with this program. If not, see . > */ > > +#include > +#include > #include > #include > #include > @@ -59,8 +61,10 @@ static int its_pci_msi_vec_count(struct pci_dev *pdev) > static int its_get_pci_alias(struct pci_dev *pdev, u16 alias, void *data) > { > struct its_pci_alias *dev_alias = data; > + u32 dev_id; > > - dev_alias->dev_id = alias; > + dev_alias->dev_id = iort_find_pci_id(pdev, alias, &dev_id) == 0 ? > + dev_id : alias; Hi tomasz, I think we need to re work this patch on top of tip/irq/core which has support for "msi-map" and "mai-parent" property support. Thanks Hanjun