Re: [Qemu-trivial] [Qemu-devel] [PATCH v2] taget-ppc: Fix read access to IBAT registers higher than IBAT3

[Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>]

On 03/11/15 12:16, Michael Tokarev wrote:

> 03.11.2015 11:00, Julio Guerra wrote:
>> Ping :)
> 
> Well, I'm not sure what can I do with this.  I've no idea what is IBAT to start
> with, so while technically the patch is a one-liner, I've no idea what it does
> and how trivial it is :)
> 
> Maybe you can include some context which teaches me what it is all about, and in
> that case it becomes really trivial, or.. I dunno :)

FWIW PPC has a set of IBAT and DBAT registers on chip, each of which
indicates a large continuous physical/virtual memory mapping for
Instruction and Data memory respectively. The idea is that the OS can
use these to provide "fast" virtual to physical lookups instead of
invoking a time-consuming hash lookup to provide the translation.

From casual observation comparing with spr_write_ibatu_h() in the same
file (which already includes the +4 offset that the patch is adding to
spr_read_ibat_h()), it does look like a genuine bug. However it really
needs someone who understands PPC architecture a bit more to give a RB
to ensure this is doing the right thing.


ATB,

Mark.