From: Peter Ujfalusi <peter.ujfalusi@ti.com>
To: kernel-janitors@vger.kernel.org
Subject: Re: [patch] dmaengine: edma: predecence bug in GET_NUM_QDMACH()
Date: Wed, 04 Nov 2015 13:53:49 +0000 [thread overview]
Message-ID: <563A0DED.1040606@ti.com> (raw)
In-Reply-To: <20151104133831.GH20966@mwanda>
On 11/04/2015 03:38 PM, Dan Carpenter wrote:
> The current code uses bits 0-2 instead of 4-6 as the comment says.
>
> Fixes: 633e42b8c546 ('dmaengine: edma: Get qDMA channel information from HW also')
> Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
True, I did not noticed this since we are not using qDMA in Linux right now.
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
>
> diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c
> index 31722d4..ba5eb17 100644
> --- a/drivers/dma/edma.c
> +++ b/drivers/dma/edma.c
> @@ -107,7 +107,7 @@
>
> /* CCCFG register */
> #define GET_NUM_DMACH(x) (x & 0x7) /* bits 0-2 */
> -#define GET_NUM_QDMACH(x) (x & 0x70 >> 4) /* bits 4-6 */
> +#define GET_NUM_QDMACH(x) ((x & 0x70) >> 4) /* bits 4-6 */
> #define GET_NUM_PAENTRY(x) ((x & 0x7000) >> 12) /* bits 12-14 */
> #define GET_NUM_EVQUE(x) ((x & 0x70000) >> 16) /* bits 16-18 */
> #define GET_NUM_REGN(x) ((x & 0x300000) >> 20) /* bits 20-21 */
>
--
Péter
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next prev parent reply other threads:[~2015-11-04 13:53 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-04 13:38 [patch] dmaengine: edma: predecence bug in GET_NUM_QDMACH() Dan Carpenter
2015-11-04 13:53 ` Peter Ujfalusi [this message]
2015-11-16 3:50 ` Vinod Koul
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