From: Peter Hurley <peter@hurleysoftware.com>
To: Timur Tabi <timur@codeaurora.org>
Cc: andre.przywara@arm.com, Linus Walleij <linus.walleij@linaro.org>,
Andrew.Jackson@arm.com, rmk+kernel@arm.linux.org.uk,
jun.nie@linaro.or, linux-serial@vger.kernel.org,
Greg Kroah-Hartman <greg@kroah.com>,
jslaby@suse.com, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] tty: amba-pl011: add options to earlycon for 32-bit reg access
Date: Sat, 7 Nov 2015 17:36:34 -0500 [thread overview]
Message-ID: <563E7CF2.60609@hurleysoftware.com> (raw)
In-Reply-To: <563CF8AF.50808@codeaurora.org>
On 11/06/2015 01:59 PM, Timur Tabi wrote:
> On 11/05/2015 08:44 PM, Peter Hurley wrote:
>> Or better yet, for sbsa32 earlycon, just use the existing port type constructs.
>> So,
>>
>> earlycon=pl011,mmio32,0x3ced1000
>>
>> which will set port->iotype to UPIO_MEM32, which in turn can be used to select
>> the correct i/o width in pl011_putc().
>
> That's a great idea. But why aren't we using it for pl011_write()?
I'll note that when I review Russell's v2 series, if necessary.
What is the plan to introduce the SBSA32 support? After the ACPI support is
upstreamed?
Regards,
Peter Hurley
> static void pl011_write(unsigned int val, const struct uart_amba_port *uap,
> unsigned int reg)
> {
> void __iomem *addr = uap->port.membase + pl011_reg_to_offset(uap, reg);
>
> if (uap->port.iotype == UPIO_MEM32)
> writel(val, addr);
> else
> writew(val, addr);
> }
>
>
WARNING: multiple messages have this Message-ID (diff)
From: peter@hurleysoftware.com (Peter Hurley)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] tty: amba-pl011: add options to earlycon for 32-bit reg access
Date: Sat, 7 Nov 2015 17:36:34 -0500 [thread overview]
Message-ID: <563E7CF2.60609@hurleysoftware.com> (raw)
In-Reply-To: <563CF8AF.50808@codeaurora.org>
On 11/06/2015 01:59 PM, Timur Tabi wrote:
> On 11/05/2015 08:44 PM, Peter Hurley wrote:
>> Or better yet, for sbsa32 earlycon, just use the existing port type constructs.
>> So,
>>
>> earlycon=pl011,mmio32,0x3ced1000
>>
>> which will set port->iotype to UPIO_MEM32, which in turn can be used to select
>> the correct i/o width in pl011_putc().
>
> That's a great idea. But why aren't we using it for pl011_write()?
I'll note that when I review Russell's v2 series, if necessary.
What is the plan to introduce the SBSA32 support? After the ACPI support is
upstreamed?
Regards,
Peter Hurley
> static void pl011_write(unsigned int val, const struct uart_amba_port *uap,
> unsigned int reg)
> {
> void __iomem *addr = uap->port.membase + pl011_reg_to_offset(uap, reg);
>
> if (uap->port.iotype == UPIO_MEM32)
> writel(val, addr);
> else
> writew(val, addr);
> }
>
>
next prev parent reply other threads:[~2015-11-07 22:36 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-06 0:37 [PATCH] tty: amba-pl011: add options to earlycon for 32-bit reg access Timur Tabi
2015-11-06 0:37 ` Timur Tabi
2015-11-06 1:52 ` Peter Hurley
2015-11-06 1:52 ` Peter Hurley
2015-11-06 2:00 ` Timur Tabi
2015-11-06 2:00 ` Timur Tabi
2015-11-06 2:44 ` Peter Hurley
2015-11-06 2:44 ` Peter Hurley
2015-11-06 18:59 ` Timur Tabi
2015-11-06 18:59 ` Timur Tabi
2015-11-07 22:36 ` Peter Hurley [this message]
2015-11-07 22:36 ` Peter Hurley
2015-11-07 23:02 ` Russell King - ARM Linux
2015-11-07 23:02 ` Russell King - ARM Linux
2015-11-07 23:31 ` Timur Tabi
2015-11-07 23:31 ` Timur Tabi
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