From: Paolo Bonzini <pbonzini@redhat.com>
To: Jian Zhou <jianjay.zhou@huawei.com>,
kvm@vger.kernel.org, gleb@kernel.org, tglx@linutronix.de,
mingo@redhat.com, hpa@zytor.com, x86@kernel.org,
linux-kernel@vger.kernel.org
Cc: herongguang.he@huawei.com, zhang.zhanghailiang@huawei.com,
weidong.huang@huawei.com, peter.huangpeng@huawei.com
Subject: Re: [PATCH v2 3/4] KVM: X86: Migration is supported
Date: Wed, 11 Nov 2015 16:15:38 +0100 [thread overview]
Message-ID: <56435B9A.1070004@redhat.com> (raw)
In-Reply-To: <1445591718-5720-4-git-send-email-jianjay.zhou@huawei.com>
On 23/10/2015 11:15, Jian Zhou wrote:
> data *msr_info)
> }
> break;
> case MSR_IA32_DEBUGCTLMSR:
> - if (!data) {
> - /* We support the non-activated case already */
> - break;
> - } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
> - /* Values other than LBR and BTF are vendor-specific,
> - thus reserved and should throw a #GP */
> + supported = DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF |
> + DEBUGCTLMSR_FREEZE_LBRS_ON_PMI;
> +
> + if (data & ~supported) {
> + /*
> + * Values other than LBR/BTF/FREEZE_LBRS_ON_PMI
> + * are not supported, thus reserved and should throw a #GP
> + */
> + vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
> + __func__, data);
> return 1;
> }
> - vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
> - __func__, data);
> + if (kvm_x86_ops->set_debugctlmsr) {
> + if (kvm_x86_ops->set_debugctlmsr(vcpu, data))
> + return 1;
> + }
> + else
> + return 1;
> +
> break;
> case 0x200 ... 0x2ff:
> return kvm_mtrr_set_msr(vcpu, msr, data);
> @@ -2078,6 +2090,33 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
> vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
> "0x%x data 0x%llx\n", msr, data);
> break;
> + case MSR_LBR_STATUS:
> + if (kvm_x86_ops->set_debugctlmsr) {
> + vcpu->arch.lbr_status = (data == 0) ? 0 : 1;
> + if (data)
> + kvm_x86_ops->set_debugctlmsr(vcpu,
> + DEBUGCTLMSR_LBR | DEBUGCTLMSR_FREEZE_LBRS_ON_PMI);
> + } else
> + vcpu_unimpl(vcpu, "lbr is disabled, ignored wrmsr: "
> + "0x%x data 0x%llx\n", msr, data);
> + break;
> + case MSR_LBR_SELECT:
> + case MSR_LBR_TOS:
> + case MSR_PENTIUM4_LER_FROM_LIP:
> + case MSR_PENTIUM4_LER_TO_LIP:
> + case MSR_PENTIUM4_LBR_TOS:
> + case MSR_IA32_LASTINTFROMIP:
> + case MSR_IA32_LASTINTTOIP:
> + case MSR_LBR_CORE2_FROM ... MSR_LBR_CORE2_FROM + 0x7:
> + case MSR_LBR_CORE2_TO ... MSR_LBR_CORE2_TO + 0x7:
> + case MSR_LBR_NHM_FROM ... MSR_LBR_NHM_FROM + 0x1f:
> + case MSR_LBR_NHM_TO ... MSR_LBR_NHM_TO + 0x1f:
> + if (kvm_x86_ops->set_lbr_msr)
> + kvm_x86_ops->set_lbr_msr(vcpu, msr, data);
> + else
> + vcpu_unimpl(vcpu, "lbr is disabled, ignored wrmsr: "
> + "0x%x data 0x%llx\n", msr, data);
I think you can just do this in kvm_x86_ops->set_msr. The old
implementation for DEBUGCTL MSR can be moved to svm.c.
Paolo
next prev parent reply other threads:[~2015-11-11 15:15 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-23 9:15 [PATCH v2 0/4] KVM: VMX: enable LBR virtualization Jian Zhou
2015-10-23 9:15 ` [PATCH v2 1/4] KVM: X86: Add arrays to save/restore LBR MSRs Jian Zhou
2015-10-23 12:14 ` kbuild test robot
2015-10-23 9:15 ` [PATCH v2 2/4] KVM: X86: LBR MSRs of supported CPU types Jian Zhou
2015-10-23 9:15 ` [PATCH v2 3/4] KVM: X86: Migration is supported Jian Zhou
2015-11-11 15:15 ` Paolo Bonzini [this message]
2015-11-12 7:06 ` Jian Zhou
2015-11-12 9:00 ` Paolo Bonzini
2015-11-12 10:39 ` Jian Zhou
2015-10-23 9:15 ` [PATCH v2 4/4] KVM: VMX: details of LBR virtualization implementation Jian Zhou
2015-11-09 1:33 ` [PATCH v2 0/4] KVM: VMX: enable LBR virtualization Jian Zhou
2015-11-09 9:06 ` Paolo Bonzini
2015-11-09 9:26 ` Jian Zhou
2015-11-11 15:23 ` Paolo Bonzini
2015-11-12 8:06 ` Jian Zhou
-- strict thread matches above, loose matches on Subject: below --
2015-10-23 8:46 Jian Zhou
2015-10-23 8:47 ` [PATCH v2 3/4] KVM: X86: Migration is supported Jian Zhou
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