From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753928AbbKLR5P (ORCPT ); Thu, 12 Nov 2015 12:57:15 -0500 Received: from smtp73.iad3a.emailsrvr.com ([173.203.187.73]:58382 "EHLO smtp73.iad3a.emailsrvr.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753708AbbKLR5N (ORCPT ); Thu, 12 Nov 2015 12:57:13 -0500 X-Auth-ID: abbotti@mev.co.uk X-Sender-Id: abbotti@mev.co.uk Subject: Re: [PATCH] comedi: pcmmio.c: Fix coding style - use BIT macro To: Ranjith Thangavel , gregkh@linuxfoundation.org References: <1447256920-11679-1-git-send-email-ranjithece24@gmail.com> Cc: hsweeten@visionengravers.com, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org From: Ian Abbott Message-ID: <5644D2F7.7080403@mev.co.uk> Date: Thu, 12 Nov 2015 17:57:11 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Icedove/38.3.0 MIME-Version: 1.0 In-Reply-To: <1447256920-11679-1-git-send-email-ranjithece24@gmail.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 11/11/15 15:48, Ranjith Thangavel wrote: > BIT macro is used for defining BIT location instead of > shifting operator - coding style issue > > Signed-off-by: Ranjith Thangavel > --- > drivers/staging/comedi/drivers/pcmmio.c | 44 +++++++++++++++---------------- > 1 file changed, 22 insertions(+), 22 deletions(-) > > diff --git a/drivers/staging/comedi/drivers/pcmmio.c b/drivers/staging/comedi/drivers/pcmmio.c > index 10472e6..f7ec224 100644 > --- a/drivers/staging/comedi/drivers/pcmmio.c > +++ b/drivers/staging/comedi/drivers/pcmmio.c > @@ -84,25 +84,25 @@ > #define PCMMIO_AI_LSB_REG 0x00 > #define PCMMIO_AI_MSB_REG 0x01 > #define PCMMIO_AI_CMD_REG 0x02 > -#define PCMMIO_AI_CMD_SE (1 << 7) > -#define PCMMIO_AI_CMD_ODD_CHAN (1 << 6) > +#define PCMMIO_AI_CMD_SE BIT(7) > +#define PCMMIO_AI_CMD_ODD_CHAN BIT(6) > #define PCMMIO_AI_CMD_CHAN_SEL(x) (((x) & 0x3) << 4) > #define PCMMIO_AI_CMD_RANGE(x) (((x) & 0x3) << 2) > -#define PCMMIO_RESOURCE_REG 0x02 > +#define PCMMIO_RESOURCE_REG 0x02 > #define PCMMIO_RESOURCE_IRQ(x) (((x) & 0xf) << 0) > #define PCMMIO_AI_STATUS_REG 0x03 > -#define PCMMIO_AI_STATUS_DATA_READY (1 << 7) > -#define PCMMIO_AI_STATUS_DATA_DMA_PEND (1 << 6) > -#define PCMMIO_AI_STATUS_CMD_DMA_PEND (1 << 5) > -#define PCMMIO_AI_STATUS_IRQ_PEND (1 << 4) > -#define PCMMIO_AI_STATUS_DATA_DRQ_ENA (1 << 2) > -#define PCMMIO_AI_STATUS_REG_SEL (1 << 3) > -#define PCMMIO_AI_STATUS_CMD_DRQ_ENA (1 << 1) > -#define PCMMIO_AI_STATUS_IRQ_ENA (1 << 0) > +#define PCMMIO_AI_STATUS_DATA_READY BIT(7) > +#define PCMMIO_AI_STATUS_DATA_DMA_PEND BIT(6) > +#define PCMMIO_AI_STATUS_CMD_DMA_PEND BIT(5) > +#define PCMMIO_AI_STATUS_IRQ_PEND BIT(4) > +#define PCMMIO_AI_STATUS_DATA_DRQ_ENA BIT(2) > +#define PCMMIO_AI_STATUS_REG_SEL BIT(3) > +#define PCMMIO_AI_STATUS_CMD_DRQ_ENA BIT(1) > +#define PCMMIO_AI_STATUS_IRQ_ENA BIT(0) > #define PCMMIO_AI_RES_ENA_REG 0x03 > -#define PCMMIO_AI_RES_ENA_CMD_REG_ACCESS (0 << 3) > -#define PCMMIO_AI_RES_ENA_AI_RES_ACCESS (1 << 3) > -#define PCMMIO_AI_RES_ENA_DIO_RES_ACCESS (1 << 4) > +#define PCMMIO_AI_RES_ENA_CMD_REG_ACCESS 0 > +#define PCMMIO_AI_RES_ENA_AI_RES_ACCESS BIT(3) > +#define PCMMIO_AI_RES_ENA_DIO_RES_ACCESS BIT(4) > #define PCMMIO_AI_2ND_ADC_OFFSET 0x04 > > #define PCMMIO_AO_LSB_REG 0x08 > @@ -125,14 +125,14 @@ > #define PCMMIO_AO_CMD_CHAN_SEL(x) (((x) & 0x03) << 1) > #define PCMMIO_AO_CMD_CHAN_SEL_ALL (0x0f << 0) > #define PCMMIO_AO_STATUS_REG 0x0b > -#define PCMMIO_AO_STATUS_DATA_READY (1 << 7) > -#define PCMMIO_AO_STATUS_DATA_DMA_PEND (1 << 6) > -#define PCMMIO_AO_STATUS_CMD_DMA_PEND (1 << 5) > -#define PCMMIO_AO_STATUS_IRQ_PEND (1 << 4) > -#define PCMMIO_AO_STATUS_DATA_DRQ_ENA (1 << 2) > -#define PCMMIO_AO_STATUS_REG_SEL (1 << 3) > -#define PCMMIO_AO_STATUS_CMD_DRQ_ENA (1 << 1) > -#define PCMMIO_AO_STATUS_IRQ_ENA (1 << 0) > +#define PCMMIO_AO_STATUS_DATA_READY BIT(7) > +#define PCMMIO_AO_STATUS_DATA_DMA_PEND BIT(6) > +#define PCMMIO_AO_STATUS_CMD_DMA_PEND BIT(5) > +#define PCMMIO_AO_STATUS_IRQ_PEND BIT(4) > +#define PCMMIO_AO_STATUS_DATA_DRQ_ENA BIT(2) > +#define PCMMIO_AO_STATUS_REG_SEL BIT(3) > +#define PCMMIO_AO_STATUS_CMD_DRQ_ENA BIT(1) > +#define PCMMIO_AO_STATUS_IRQ_ENA BIT(0) > #define PCMMIO_AO_RESOURCE_ENA_REG 0x0b > #define PCMMIO_AO_2ND_DAC_OFFSET 0x04 > > The macro values used to be more-or-less nicely aligned in a column, but now they are not so nicely aligned. Could you add or delete TABs as needed to line them up? Remember, tab stops are every 8 spaces. -- -=( Ian Abbott @ MEV Ltd. E-mail: )=- -=( Web: http://www.mev.co.uk/ )=-