From mboxrd@z Thu Jan 1 00:00:00 1970 From: Julien Grall Subject: Re: [PATCH 2/9] xen/arm: vgic-v3: Only emulate identification registers requested by the spec Date: Wed, 18 Nov 2015 16:46:12 +0000 Message-ID: <564CAB54.30306@citrix.com> References: <1447415672-31633-1-git-send-email-julien.grall@citrix.com> <1447415672-31633-3-git-send-email-julien.grall@citrix.com> <1447680456.27871.89.camel@citrix.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Zz5tV-0004my-2r for xen-devel@lists.xenproject.org; Wed, 18 Nov 2015 16:47:41 +0000 In-Reply-To: <1447680456.27871.89.camel@citrix.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Ian Campbell , xen-devel@lists.xenproject.org Cc: stefano.stabellini@eu.citrix.com List-Id: xen-devel@lists.xenproject.org Hi Ian, On 16/11/15 13:27, Ian Campbell wrote: > On Fri, 2015-11-13 at 11:54 +0000, Julien Grall wrote: >> Most of the identification registers space contains implementation >> defined registers (see 8.1.13 in ARM IHI 0069A) and only GIC{D,R}_PIDR2 >> is required to be implemented. > > I think you mean s/requested/required/ in the subject too? Right, I will fix it in the next version. >> >> Currently the emulation of those registers mimic the ARM implementation, >> but it's untrue to say that we properly emulate a such implementation. >> >> Keep only GIC{D,R}_PIDR2 implemented with the "implementationd defined > > "implementation" > >> bits" to zero and the ArchRev field (bits[7:4]) to 0x3 as we emulate a >> GICv3. >> >> Note that the emulation of the range wasn't valid anyway because the >> registers are split in 2 sets (PIDR4-PIDR7 and PIDR0-PIDR2). >> >> Signed-off-by: Julien Grall > > Acked-by: Ian Campbell Thank you! Regards, -- Julien Grall