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diff for duplicates of <564D11C0.409@broadcom.com>

diff --git a/a/1.txt b/N1/1.txt
index 428a272..050ce9e 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -3,7 +3,7 @@
 On 11/18/2015 3:13 PM, Jon Mason wrote:
 > Add device tree entries for clock support for Broadcom Northstar 2 SoC
 >
-> Signed-off-by: Jon Mason <jonmason@broadcom.com>
+> Signed-off-by: Jon Mason <jonmason-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
 > ---
 >   arch/arm64/boot/dts/broadcom/ns2.dtsi | 80 ++++++++++++++++++++++++++++++++++-
 >   1 file changed, 79 insertions(+), 1 deletion(-)
@@ -63,7 +63,7 @@ other clocks with base register address under a bus node.
 >   			mmu-masters;
 >   		};
 >
-> +		lcpll_ddr: lcpll_ddr at 6501d058 {
+> +		lcpll_ddr: lcpll_ddr@6501d058 {
 > +			#clock-cells = <1>;
 > +			compatible = "brcm,ns2-lcpll-ddr";
 > +			reg = <0x6501d058 0x20>,
@@ -76,7 +76,7 @@ other clocks with base register address under a bus node.
 > +					     "ddr_ch5_unused";
 > +		};
 > +
-> +		lcpll_ports: lcpll_ports at 6501d078 {
+> +		lcpll_ports: lcpll_ports@6501d078 {
 > +			#clock-cells = <1>;
 > +			compatible = "brcm,ns2-lcpll-ports";
 > +			reg = <0x6501d078 0x20>,
@@ -90,7 +90,7 @@ other clocks with base register address under a bus node.
 > +					     "ports_ch5_unused";
 > +		};
 > +
-> +		genpll_scr: genpll_scr at 6501d098 {
+> +		genpll_scr: genpll_scr@6501d098 {
 > +			#clock-cells = <1>;
 > +			compatible = "brcm,ns2-genpll-scr";
 > +			reg = <0x6501d098 0x32>,
@@ -102,7 +102,7 @@ other clocks with base register address under a bus node.
 > +					     "scr_ch4_unused", "scr_ch5_unused";
 > +		};
 > +
-> +		genpll_sw: genpll_sw at 6501d0c4 {
+> +		genpll_sw: genpll_sw@6501d0c4 {
 > +			#clock-cells = <1>;
 > +			compatible = "brcm,ns2-genpll-sw";
 > +			reg = <0x6501d0c4 0x32>,
@@ -113,7 +113,7 @@ other clocks with base register address under a bus node.
 > +					     "chimp", "port", "sdio";
 > +		};
 > +
->   		crmu: crmu at 65024000 {
+>   		crmu: crmu@65024000 {
 >   			compatible = "syscon";
 >   			reg = <0x65024000 0x100>;
 > @@ -204,7 +282,7 @@
@@ -126,3 +126,7 @@ other clocks with base register address under a bus node.
 >   		};
 >
 >
+--
+To unsubscribe from this list: send the line "unsubscribe devicetree" in
+the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+More majordomo info at  http://vger.kernel.org/majordomo-info.html
diff --git a/a/content_digest b/N1/content_digest
index 29c0893..ef12aed 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,9 +1,22 @@
  "ref\01447888430-4451-1-git-send-email-jonmason@broadcom.com\0"
  "ref\01447888430-4451-4-git-send-email-jonmason@broadcom.com\0"
- "From\0rjui@broadcom.com (Ray Jui)\0"
- "Subject\0[PATCH 3/3] ARM64: dts: enable clock support for Broadcom NS2\0"
+ "ref\01447888430-4451-4-git-send-email-jonmason-dY08KVG/lbpWk0Htik3J/w@public.gmane.org\0"
+ "From\0Ray Jui <rjui-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>\0"
+ "Subject\0Re: [PATCH 3/3] ARM64: dts: enable clock support for Broadcom NS2\0"
  "Date\0Wed, 18 Nov 2015 16:03:12 -0800\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0Jon Mason <jonmason-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>"
+  Florian Fainelli <f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
+  Hauke Mehrtens <hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org>
+  Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
+  Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org>
+  Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>
+  Ian Campbell <ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>
+  Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
+ " Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>\0"
+ "Cc\0devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
+  linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
+  linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+ " bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w@public.gmane.org\0"
  "\00:1\0"
  "b\0"
  "\n"
@@ -11,7 +24,7 @@
  "On 11/18/2015 3:13 PM, Jon Mason wrote:\n"
  "> Add device tree entries for clock support for Broadcom Northstar 2 SoC\n"
  ">\n"
- "> Signed-off-by: Jon Mason <jonmason@broadcom.com>\n"
+ "> Signed-off-by: Jon Mason <jonmason-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>\n"
  "> ---\n"
  ">   arch/arm64/boot/dts/broadcom/ns2.dtsi | 80 ++++++++++++++++++++++++++++++++++-\n"
  ">   1 file changed, 79 insertions(+), 1 deletion(-)\n"
@@ -71,7 +84,7 @@
  ">   \t\t\tmmu-masters;\n"
  ">   \t\t};\n"
  ">\n"
- "> +\t\tlcpll_ddr: lcpll_ddr at 6501d058 {\n"
+ "> +\t\tlcpll_ddr: lcpll_ddr@6501d058 {\n"
  "> +\t\t\t#clock-cells = <1>;\n"
  "> +\t\t\tcompatible = \"brcm,ns2-lcpll-ddr\";\n"
  "> +\t\t\treg = <0x6501d058 0x20>,\n"
@@ -84,7 +97,7 @@
  "> +\t\t\t\t\t     \"ddr_ch5_unused\";\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tlcpll_ports: lcpll_ports at 6501d078 {\n"
+ "> +\t\tlcpll_ports: lcpll_ports@6501d078 {\n"
  "> +\t\t\t#clock-cells = <1>;\n"
  "> +\t\t\tcompatible = \"brcm,ns2-lcpll-ports\";\n"
  "> +\t\t\treg = <0x6501d078 0x20>,\n"
@@ -98,7 +111,7 @@
  "> +\t\t\t\t\t     \"ports_ch5_unused\";\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tgenpll_scr: genpll_scr at 6501d098 {\n"
+ "> +\t\tgenpll_scr: genpll_scr@6501d098 {\n"
  "> +\t\t\t#clock-cells = <1>;\n"
  "> +\t\t\tcompatible = \"brcm,ns2-genpll-scr\";\n"
  "> +\t\t\treg = <0x6501d098 0x32>,\n"
@@ -110,7 +123,7 @@
  "> +\t\t\t\t\t     \"scr_ch4_unused\", \"scr_ch5_unused\";\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tgenpll_sw: genpll_sw at 6501d0c4 {\n"
+ "> +\t\tgenpll_sw: genpll_sw@6501d0c4 {\n"
  "> +\t\t\t#clock-cells = <1>;\n"
  "> +\t\t\tcompatible = \"brcm,ns2-genpll-sw\";\n"
  "> +\t\t\treg = <0x6501d0c4 0x32>,\n"
@@ -121,7 +134,7 @@
  "> +\t\t\t\t\t     \"chimp\", \"port\", \"sdio\";\n"
  "> +\t\t};\n"
  "> +\n"
- ">   \t\tcrmu: crmu at 65024000 {\n"
+ ">   \t\tcrmu: crmu@65024000 {\n"
  ">   \t\t\tcompatible = \"syscon\";\n"
  ">   \t\t\treg = <0x65024000 0x100>;\n"
  "> @@ -204,7 +282,7 @@\n"
@@ -133,6 +146,10 @@
  ">   \t\t\tstatus = \"disabled\";\n"
  ">   \t\t};\n"
  ">\n"
- >
+ ">\n"
+ "--\n"
+ "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n"
+ "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n"
+ More majordomo info at  http://vger.kernel.org/majordomo-info.html
 
-5c86f6e6fd2111ee37d069f1cc8f05df948b74553ba195b7cf82e62073320aed
+a3d4df0199dee0138f68f1b74458a5563e4546e166370bb6cb1a8944c59d5ad6

diff --git a/a/1.txt b/N2/1.txt
index 428a272..f69371a 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -63,7 +63,7 @@ other clocks with base register address under a bus node.
 >   			mmu-masters;
 >   		};
 >
-> +		lcpll_ddr: lcpll_ddr at 6501d058 {
+> +		lcpll_ddr: lcpll_ddr@6501d058 {
 > +			#clock-cells = <1>;
 > +			compatible = "brcm,ns2-lcpll-ddr";
 > +			reg = <0x6501d058 0x20>,
@@ -76,7 +76,7 @@ other clocks with base register address under a bus node.
 > +					     "ddr_ch5_unused";
 > +		};
 > +
-> +		lcpll_ports: lcpll_ports at 6501d078 {
+> +		lcpll_ports: lcpll_ports@6501d078 {
 > +			#clock-cells = <1>;
 > +			compatible = "brcm,ns2-lcpll-ports";
 > +			reg = <0x6501d078 0x20>,
@@ -90,7 +90,7 @@ other clocks with base register address under a bus node.
 > +					     "ports_ch5_unused";
 > +		};
 > +
-> +		genpll_scr: genpll_scr at 6501d098 {
+> +		genpll_scr: genpll_scr@6501d098 {
 > +			#clock-cells = <1>;
 > +			compatible = "brcm,ns2-genpll-scr";
 > +			reg = <0x6501d098 0x32>,
@@ -102,7 +102,7 @@ other clocks with base register address under a bus node.
 > +					     "scr_ch4_unused", "scr_ch5_unused";
 > +		};
 > +
-> +		genpll_sw: genpll_sw at 6501d0c4 {
+> +		genpll_sw: genpll_sw@6501d0c4 {
 > +			#clock-cells = <1>;
 > +			compatible = "brcm,ns2-genpll-sw";
 > +			reg = <0x6501d0c4 0x32>,
@@ -113,7 +113,7 @@ other clocks with base register address under a bus node.
 > +					     "chimp", "port", "sdio";
 > +		};
 > +
->   		crmu: crmu at 65024000 {
+>   		crmu: crmu@65024000 {
 >   			compatible = "syscon";
 >   			reg = <0x65024000 0x100>;
 > @@ -204,7 +282,7 @@
diff --git a/a/content_digest b/N2/content_digest
index 29c0893..c61efd1 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -1,9 +1,21 @@
  "ref\01447888430-4451-1-git-send-email-jonmason@broadcom.com\0"
  "ref\01447888430-4451-4-git-send-email-jonmason@broadcom.com\0"
- "From\0rjui@broadcom.com (Ray Jui)\0"
- "Subject\0[PATCH 3/3] ARM64: dts: enable clock support for Broadcom NS2\0"
+ "From\0Ray Jui <rjui@broadcom.com>\0"
+ "Subject\0Re: [PATCH 3/3] ARM64: dts: enable clock support for Broadcom NS2\0"
  "Date\0Wed, 18 Nov 2015 16:03:12 -0800\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0Jon Mason <jonmason@broadcom.com>"
+  Florian Fainelli <f.fainelli@gmail.com>
+  Hauke Mehrtens <hauke@hauke-m.de>
+  Rob Herring <robh+dt@kernel.org>
+  Pawel Moll <pawel.moll@arm.com>
+  Mark Rutland <mark.rutland@arm.com>
+  Ian Campbell <ijc+devicetree@hellion.org.uk>
+  Kumar Gala <galak@codeaurora.org>
+ " Russell King <linux@arm.linux.org.uk>\0"
+ "Cc\0<devicetree@vger.kernel.org>"
+  <linux-arm-kernel@lists.infradead.org>
+  <linux-kernel@vger.kernel.org>
+ " <bcm-kernel-feedback-list@broadcom.com>\0"
  "\00:1\0"
  "b\0"
  "\n"
@@ -71,7 +83,7 @@
  ">   \t\t\tmmu-masters;\n"
  ">   \t\t};\n"
  ">\n"
- "> +\t\tlcpll_ddr: lcpll_ddr at 6501d058 {\n"
+ "> +\t\tlcpll_ddr: lcpll_ddr@6501d058 {\n"
  "> +\t\t\t#clock-cells = <1>;\n"
  "> +\t\t\tcompatible = \"brcm,ns2-lcpll-ddr\";\n"
  "> +\t\t\treg = <0x6501d058 0x20>,\n"
@@ -84,7 +96,7 @@
  "> +\t\t\t\t\t     \"ddr_ch5_unused\";\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tlcpll_ports: lcpll_ports at 6501d078 {\n"
+ "> +\t\tlcpll_ports: lcpll_ports@6501d078 {\n"
  "> +\t\t\t#clock-cells = <1>;\n"
  "> +\t\t\tcompatible = \"brcm,ns2-lcpll-ports\";\n"
  "> +\t\t\treg = <0x6501d078 0x20>,\n"
@@ -98,7 +110,7 @@
  "> +\t\t\t\t\t     \"ports_ch5_unused\";\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tgenpll_scr: genpll_scr at 6501d098 {\n"
+ "> +\t\tgenpll_scr: genpll_scr@6501d098 {\n"
  "> +\t\t\t#clock-cells = <1>;\n"
  "> +\t\t\tcompatible = \"brcm,ns2-genpll-scr\";\n"
  "> +\t\t\treg = <0x6501d098 0x32>,\n"
@@ -110,7 +122,7 @@
  "> +\t\t\t\t\t     \"scr_ch4_unused\", \"scr_ch5_unused\";\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tgenpll_sw: genpll_sw at 6501d0c4 {\n"
+ "> +\t\tgenpll_sw: genpll_sw@6501d0c4 {\n"
  "> +\t\t\t#clock-cells = <1>;\n"
  "> +\t\t\tcompatible = \"brcm,ns2-genpll-sw\";\n"
  "> +\t\t\treg = <0x6501d0c4 0x32>,\n"
@@ -121,7 +133,7 @@
  "> +\t\t\t\t\t     \"chimp\", \"port\", \"sdio\";\n"
  "> +\t\t};\n"
  "> +\n"
- ">   \t\tcrmu: crmu at 65024000 {\n"
+ ">   \t\tcrmu: crmu@65024000 {\n"
  ">   \t\t\tcompatible = \"syscon\";\n"
  ">   \t\t\treg = <0x65024000 0x100>;\n"
  "> @@ -204,7 +282,7 @@\n"
@@ -135,4 +147,4 @@
  ">\n"
  >
 
-5c86f6e6fd2111ee37d069f1cc8f05df948b74553ba195b7cf82e62073320aed
+99a2f0be0df9c937a7a7493230ad0153b801bde00d0591b9dc61b28b96610db1

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