[U-Boot] PCIE_MEM_BUS for Freescale SoC

[York Sun <yorksun@freescale.com>]

Roy,

Do you remember the reason why we use different virtual memory address from pci
bus address with 36-bit? For example

include/configs/P1022DS.h-496-#define CONFIG_SYS_PCIE1_MEM_VIRT 0xc0000000
include/configs/P1022DS.h-497-#ifdef CONFIG_PHYS_64BIT
include/configs/P1022DS.h:498:#define CONFIG_SYS_PCIE1_MEM_BUS  0xe0000000
include/configs/P1022DS.h-499-#define CONFIG_SYS_PCIE1_MEM_PHYS 0xc40000000ull
include/configs/P1022DS.h-500-#else
include/configs/P1022DS.h:501:#define CONFIG_SYS_PCIE1_MEM_BUS  0xc0000000
include/configs/P1022DS.h-502-#define CONFIG_SYS_PCIE1_MEM_PHYS 0xc0000000
include/configs/P1022DS.h-503-#endif

As far as I can tell, the following is the mapping

TLB: MEM_VIRT=>MEM_PHYS
PCI: MEM_BUS=>MEM_PHYS
LAW: MEM_PHYS=>pcie interface

Being different for MEM_VIRT and MEM_BUS cause confusion. When I run "pci
header" command to show the BARs, I expect I can use "md" to access the BAR
address. That's not the case if MEM_BUS is different from MEM_VIRT.

I forget why we did this for 36-bit addressing. The MEM_VIRT is the same as
MEM_BUS for 32-bit addressing. And why do we use the same MEM_BUS address for
all PCIe hose? I know they are not conflicting, but is it necessary?

Let me know if you have any concerns. Otherwise I will change all platforms to
use consistent addresses.

York