diff for duplicates of <5652EF87.50604@redhat.com> diff --git a/a/1.txt b/N1/1.txt index 1e49c78..b266afc 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -4,7 +4,7 @@ On 23-11-15 09:57, Maxime Ripard wrote: > Hi, > > On Sun, Nov 01, 2015 at 02:33:23PM +0100, Jens Kuske wrote: ->>>> + bus_gates: clk at 01c20060 { +>>>> + bus_gates: clk@01c20060 { >>>> + #clock-cells = <1>; >>>> + compatible = "allwinner,sun8i-h3-bus-gates-clk"; >>>> + reg = <0x01c20060 0x14>; @@ -69,7 +69,7 @@ On 23-11-15 09:57, Maxime Ripard wrote: > >>>> + }; >>>> + ->>>> + mmc0_clk: clk at 01c20088 { +>>>> + mmc0_clk: clk@01c20088 { >>>> + #clock-cells = <1>; >>>> + compatible = "allwinner,sun4i-a10-mmc-clk"; >>>> + reg = <0x01c20088 0x4>; @@ -79,7 +79,7 @@ On 23-11-15 09:57, Maxime Ripard wrote: >>>> + "mmc0_sample"; >>>> + }; >>>> + ->>>> + mmc1_clk: clk at 01c2008c { +>>>> + mmc1_clk: clk@01c2008c { >>>> + #clock-cells = <1>; >>>> + compatible = "allwinner,sun4i-a10-mmc-clk"; >>>> + reg = <0x01c2008c 0x4>; @@ -89,7 +89,7 @@ On 23-11-15 09:57, Maxime Ripard wrote: >>>> + "mmc1_sample"; >>>> + }; >>>> + ->>>> + mmc2_clk: clk at 01c20090 { +>>>> + mmc2_clk: clk@01c20090 { >>>> + #clock-cells = <1>; >>>> + compatible = "allwinner,sun4i-a10-mmc-clk"; >>>> + reg = <0x01c20090 0x4>; @@ -99,7 +99,7 @@ On 23-11-15 09:57, Maxime Ripard wrote: >>>> + "mmc2_sample"; >>>> + }; >>>> + ->>>> + mbus_clk: clk at 01c2015c { +>>>> + mbus_clk: clk@01c2015c { >>>> + #clock-cells = <0>; >>>> + compatible = "allwinner,sun8i-a23-mbus-clk"; >>>> + reg = <0x01c2015c 0x4>; @@ -114,7 +114,7 @@ On 23-11-15 09:57, Maxime Ripard wrote: >>>> + #size-cells = <1>; >>>> + ranges; >>>> + ->>>> + dma: dma-controller at 01c02000 { +>>>> + dma: dma-controller@01c02000 { >>>> + compatible = "allwinner,sun8i-h3-dma"; >>>> + reg = <0x01c02000 0x1000>; >>>> + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; @@ -123,7 +123,7 @@ On 23-11-15 09:57, Maxime Ripard wrote: >>>> + #dma-cells = <1>; >>>> + }; >>>> + ->>>> + mmc0: mmc at 01c0f000 { +>>>> + mmc0: mmc@01c0f000 { >>>> + compatible = "allwinner,sun5i-a13-mmc"; >>>> + reg = <0x01c0f000 0x1000>; >>>> + clocks = <&bus_gates 8>, @@ -142,7 +142,7 @@ On 23-11-15 09:57, Maxime Ripard wrote: >>>> + #size-cells = <0>; >>>> + }; >>>> + ->>>> + mmc1: mmc at 01c10000 { +>>>> + mmc1: mmc@01c10000 { >>>> + compatible = "allwinner,sun5i-a13-mmc"; >>>> + reg = <0x01c10000 0x1000>; >>>> + clocks = <&bus_gates 9>, @@ -161,7 +161,7 @@ On 23-11-15 09:57, Maxime Ripard wrote: >>>> + #size-cells = <0>; >>>> + }; >>>> + ->>>> + mmc2: mmc at 01c11000 { +>>>> + mmc2: mmc@01c11000 { >>>> + compatible = "allwinner,sun5i-a13-mmc"; >>>> + reg = <0x01c11000 0x1000>; >>>> + clocks = <&bus_gates 10>, @@ -180,7 +180,7 @@ On 23-11-15 09:57, Maxime Ripard wrote: >>>> + #size-cells = <0>; >>>> + }; >>>> + ->>>> + pio: pinctrl at 01c20800 { +>>>> + pio: pinctrl@01c20800 { >>>> + compatible = "allwinner,sun8i-h3-pinctrl"; >>>> + reg = <0x01c20800 0x400>; >>>> + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, @@ -191,14 +191,14 @@ On 23-11-15 09:57, Maxime Ripard wrote: >>>> + interrupt-controller; >>>> + #interrupt-cells = <2>; >>>> + ->>>> + uart0_pins_a: uart0 at 0 { +>>>> + uart0_pins_a: uart0@0 { >>>> + allwinner,pins = "PA4", "PA5"; >>>> + allwinner,function = "uart0"; >>>> + allwinner,drive = <SUN4I_PINCTRL_10_MA>; >>>> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; >>>> + }; >>>> + ->>>> + mmc0_pins_a: mmc0 at 0 { +>>>> + mmc0_pins_a: mmc0@0 { >>>> + allwinner,pins = "PF0", "PF1", "PF2", "PF3", >>>> + "PF4", "PF5"; >>>> + allwinner,function = "mmc0"; @@ -206,7 +206,7 @@ On 23-11-15 09:57, Maxime Ripard wrote: >>>> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; >>>> + }; >>>> + ->>>> + mmc0_cd_pin: mmc0_cd_pin at 0 { +>>>> + mmc0_cd_pin: mmc0_cd_pin@0 { >>>> + allwinner,pins = "PF6"; >>>> + allwinner,function = "gpio_in"; >>>> + allwinner,drive = <SUN4I_PINCTRL_10_MA>; diff --git a/a/content_digest b/N1/content_digest index 64336d7..eca0e0c 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -3,10 +3,22 @@ "ref\0CAGb2v64NZMw0vNvVtepthUMox5TDy07gTBAWZqf8GAq6TrMpOg@mail.gmail.com\0" "ref\0563614A3.6060805@gmail.com\0" "ref\020151123085719.GT32142@lukather\0" - "From\0hdegoede@redhat.com (Hans de Goede)\0" - "Subject\0[linux-sunxi] Re: [PATCH v4 5/6] ARM: dts: sunxi: Add Allwinner H3 DTSI\0" + "From\0Hans de Goede <hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>\0" + "Subject\0Re: Re: [PATCH v4 5/6] ARM: dts: sunxi: Add Allwinner H3 DTSI\0" "Date\0Mon, 23 Nov 2015 11:50:47 +0100\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org" + " Jens Kuske <jenskuske-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0" + "Cc\0Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>" + Michael Turquette <mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org> + Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> + Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> + Philipp Zabel <p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> + " Emilio L\303\263pez <emilio-0Z03zUJReD5OxF6Tv1QG9Q@public.gmane.org>" + Vishnu Patekar <vishnupatekar0510-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> + devicetree <devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> + linux-arm-kernel <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org> + linux-kernel <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> + " linux-sunxi <linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org>\0" "\00:1\0" "b\0" "HI,\n" @@ -15,7 +27,7 @@ "> Hi,\n" ">\n" "> On Sun, Nov 01, 2015 at 02:33:23PM +0100, Jens Kuske wrote:\n" - ">>>> + bus_gates: clk at 01c20060 {\n" + ">>>> + bus_gates: clk@01c20060 {\n" ">>>> + #clock-cells = <1>;\n" ">>>> + compatible = \"allwinner,sun8i-h3-bus-gates-clk\";\n" ">>>> + reg = <0x01c20060 0x14>;\n" @@ -80,7 +92,7 @@ ">\n" ">>>> + };\n" ">>>> +\n" - ">>>> + mmc0_clk: clk at 01c20088 {\n" + ">>>> + mmc0_clk: clk@01c20088 {\n" ">>>> + #clock-cells = <1>;\n" ">>>> + compatible = \"allwinner,sun4i-a10-mmc-clk\";\n" ">>>> + reg = <0x01c20088 0x4>;\n" @@ -90,7 +102,7 @@ ">>>> + \"mmc0_sample\";\n" ">>>> + };\n" ">>>> +\n" - ">>>> + mmc1_clk: clk at 01c2008c {\n" + ">>>> + mmc1_clk: clk@01c2008c {\n" ">>>> + #clock-cells = <1>;\n" ">>>> + compatible = \"allwinner,sun4i-a10-mmc-clk\";\n" ">>>> + reg = <0x01c2008c 0x4>;\n" @@ -100,7 +112,7 @@ ">>>> + \"mmc1_sample\";\n" ">>>> + };\n" ">>>> +\n" - ">>>> + mmc2_clk: clk at 01c20090 {\n" + ">>>> + mmc2_clk: clk@01c20090 {\n" ">>>> + #clock-cells = <1>;\n" ">>>> + compatible = \"allwinner,sun4i-a10-mmc-clk\";\n" ">>>> + reg = <0x01c20090 0x4>;\n" @@ -110,7 +122,7 @@ ">>>> + \"mmc2_sample\";\n" ">>>> + };\n" ">>>> +\n" - ">>>> + mbus_clk: clk at 01c2015c {\n" + ">>>> + mbus_clk: clk@01c2015c {\n" ">>>> + #clock-cells = <0>;\n" ">>>> + compatible = \"allwinner,sun8i-a23-mbus-clk\";\n" ">>>> + reg = <0x01c2015c 0x4>;\n" @@ -125,7 +137,7 @@ ">>>> + #size-cells = <1>;\n" ">>>> + ranges;\n" ">>>> +\n" - ">>>> + dma: dma-controller at 01c02000 {\n" + ">>>> + dma: dma-controller@01c02000 {\n" ">>>> + compatible = \"allwinner,sun8i-h3-dma\";\n" ">>>> + reg = <0x01c02000 0x1000>;\n" ">>>> + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -134,7 +146,7 @@ ">>>> + #dma-cells = <1>;\n" ">>>> + };\n" ">>>> +\n" - ">>>> + mmc0: mmc at 01c0f000 {\n" + ">>>> + mmc0: mmc@01c0f000 {\n" ">>>> + compatible = \"allwinner,sun5i-a13-mmc\";\n" ">>>> + reg = <0x01c0f000 0x1000>;\n" ">>>> + clocks = <&bus_gates 8>,\n" @@ -153,7 +165,7 @@ ">>>> + #size-cells = <0>;\n" ">>>> + };\n" ">>>> +\n" - ">>>> + mmc1: mmc at 01c10000 {\n" + ">>>> + mmc1: mmc@01c10000 {\n" ">>>> + compatible = \"allwinner,sun5i-a13-mmc\";\n" ">>>> + reg = <0x01c10000 0x1000>;\n" ">>>> + clocks = <&bus_gates 9>,\n" @@ -172,7 +184,7 @@ ">>>> + #size-cells = <0>;\n" ">>>> + };\n" ">>>> +\n" - ">>>> + mmc2: mmc at 01c11000 {\n" + ">>>> + mmc2: mmc@01c11000 {\n" ">>>> + compatible = \"allwinner,sun5i-a13-mmc\";\n" ">>>> + reg = <0x01c11000 0x1000>;\n" ">>>> + clocks = <&bus_gates 10>,\n" @@ -191,7 +203,7 @@ ">>>> + #size-cells = <0>;\n" ">>>> + };\n" ">>>> +\n" - ">>>> + pio: pinctrl at 01c20800 {\n" + ">>>> + pio: pinctrl@01c20800 {\n" ">>>> + compatible = \"allwinner,sun8i-h3-pinctrl\";\n" ">>>> + reg = <0x01c20800 0x400>;\n" ">>>> + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,\n" @@ -202,14 +214,14 @@ ">>>> + interrupt-controller;\n" ">>>> + #interrupt-cells = <2>;\n" ">>>> +\n" - ">>>> + uart0_pins_a: uart0 at 0 {\n" + ">>>> + uart0_pins_a: uart0@0 {\n" ">>>> + allwinner,pins = \"PA4\", \"PA5\";\n" ">>>> + allwinner,function = \"uart0\";\n" ">>>> + allwinner,drive = <SUN4I_PINCTRL_10_MA>;\n" ">>>> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;\n" ">>>> + };\n" ">>>> +\n" - ">>>> + mmc0_pins_a: mmc0 at 0 {\n" + ">>>> + mmc0_pins_a: mmc0@0 {\n" ">>>> + allwinner,pins = \"PF0\", \"PF1\", \"PF2\", \"PF3\",\n" ">>>> + \"PF4\", \"PF5\";\n" ">>>> + allwinner,function = \"mmc0\";\n" @@ -217,7 +229,7 @@ ">>>> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;\n" ">>>> + };\n" ">>>> +\n" - ">>>> + mmc0_cd_pin: mmc0_cd_pin at 0 {\n" + ">>>> + mmc0_cd_pin: mmc0_cd_pin@0 {\n" ">>>> + allwinner,pins = \"PF6\";\n" ">>>> + allwinner,function = \"gpio_in\";\n" ">>>> + allwinner,drive = <SUN4I_PINCTRL_10_MA>;\n" @@ -250,4 +262,4 @@ "\n" Hans -0193cb992e31e6dd86de4f1ce0115325279a44d9e0412913fead62fcceb14d6e +e45a8e81e51ac4bd77e78dcf1c9ace9493aa3df2e5285b4a93ec89e77166ab56
diff --git a/a/1.txt b/N2/1.txt index 1e49c78..b266afc 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -4,7 +4,7 @@ On 23-11-15 09:57, Maxime Ripard wrote: > Hi, > > On Sun, Nov 01, 2015 at 02:33:23PM +0100, Jens Kuske wrote: ->>>> + bus_gates: clk at 01c20060 { +>>>> + bus_gates: clk@01c20060 { >>>> + #clock-cells = <1>; >>>> + compatible = "allwinner,sun8i-h3-bus-gates-clk"; >>>> + reg = <0x01c20060 0x14>; @@ -69,7 +69,7 @@ On 23-11-15 09:57, Maxime Ripard wrote: > >>>> + }; >>>> + ->>>> + mmc0_clk: clk at 01c20088 { +>>>> + mmc0_clk: clk@01c20088 { >>>> + #clock-cells = <1>; >>>> + compatible = "allwinner,sun4i-a10-mmc-clk"; >>>> + reg = <0x01c20088 0x4>; @@ -79,7 +79,7 @@ On 23-11-15 09:57, Maxime Ripard wrote: >>>> + "mmc0_sample"; >>>> + }; >>>> + ->>>> + mmc1_clk: clk at 01c2008c { +>>>> + mmc1_clk: clk@01c2008c { >>>> + #clock-cells = <1>; >>>> + compatible = "allwinner,sun4i-a10-mmc-clk"; >>>> + reg = <0x01c2008c 0x4>; @@ -89,7 +89,7 @@ On 23-11-15 09:57, Maxime Ripard wrote: >>>> + "mmc1_sample"; >>>> + }; >>>> + ->>>> + mmc2_clk: clk at 01c20090 { +>>>> + mmc2_clk: clk@01c20090 { >>>> + #clock-cells = <1>; >>>> + compatible = "allwinner,sun4i-a10-mmc-clk"; >>>> + reg = <0x01c20090 0x4>; @@ -99,7 +99,7 @@ On 23-11-15 09:57, Maxime Ripard wrote: >>>> + "mmc2_sample"; >>>> + }; >>>> + ->>>> + mbus_clk: clk at 01c2015c { +>>>> + mbus_clk: clk@01c2015c { >>>> + #clock-cells = <0>; >>>> + compatible = "allwinner,sun8i-a23-mbus-clk"; >>>> + reg = <0x01c2015c 0x4>; @@ -114,7 +114,7 @@ On 23-11-15 09:57, Maxime Ripard wrote: >>>> + #size-cells = <1>; >>>> + ranges; >>>> + ->>>> + dma: dma-controller at 01c02000 { +>>>> + dma: dma-controller@01c02000 { >>>> + compatible = "allwinner,sun8i-h3-dma"; >>>> + reg = <0x01c02000 0x1000>; >>>> + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; @@ -123,7 +123,7 @@ On 23-11-15 09:57, Maxime Ripard wrote: >>>> + #dma-cells = <1>; >>>> + }; >>>> + ->>>> + mmc0: mmc at 01c0f000 { +>>>> + mmc0: mmc@01c0f000 { >>>> + compatible = "allwinner,sun5i-a13-mmc"; >>>> + reg = <0x01c0f000 0x1000>; >>>> + clocks = <&bus_gates 8>, @@ -142,7 +142,7 @@ On 23-11-15 09:57, Maxime Ripard wrote: >>>> + #size-cells = <0>; >>>> + }; >>>> + ->>>> + mmc1: mmc at 01c10000 { +>>>> + mmc1: mmc@01c10000 { >>>> + compatible = "allwinner,sun5i-a13-mmc"; >>>> + reg = <0x01c10000 0x1000>; >>>> + clocks = <&bus_gates 9>, @@ -161,7 +161,7 @@ On 23-11-15 09:57, Maxime Ripard wrote: >>>> + #size-cells = <0>; >>>> + }; >>>> + ->>>> + mmc2: mmc at 01c11000 { +>>>> + mmc2: mmc@01c11000 { >>>> + compatible = "allwinner,sun5i-a13-mmc"; >>>> + reg = <0x01c11000 0x1000>; >>>> + clocks = <&bus_gates 10>, @@ -180,7 +180,7 @@ On 23-11-15 09:57, Maxime Ripard wrote: >>>> + #size-cells = <0>; >>>> + }; >>>> + ->>>> + pio: pinctrl at 01c20800 { +>>>> + pio: pinctrl@01c20800 { >>>> + compatible = "allwinner,sun8i-h3-pinctrl"; >>>> + reg = <0x01c20800 0x400>; >>>> + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, @@ -191,14 +191,14 @@ On 23-11-15 09:57, Maxime Ripard wrote: >>>> + interrupt-controller; >>>> + #interrupt-cells = <2>; >>>> + ->>>> + uart0_pins_a: uart0 at 0 { +>>>> + uart0_pins_a: uart0@0 { >>>> + allwinner,pins = "PA4", "PA5"; >>>> + allwinner,function = "uart0"; >>>> + allwinner,drive = <SUN4I_PINCTRL_10_MA>; >>>> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; >>>> + }; >>>> + ->>>> + mmc0_pins_a: mmc0 at 0 { +>>>> + mmc0_pins_a: mmc0@0 { >>>> + allwinner,pins = "PF0", "PF1", "PF2", "PF3", >>>> + "PF4", "PF5"; >>>> + allwinner,function = "mmc0"; @@ -206,7 +206,7 @@ On 23-11-15 09:57, Maxime Ripard wrote: >>>> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; >>>> + }; >>>> + ->>>> + mmc0_cd_pin: mmc0_cd_pin at 0 { +>>>> + mmc0_cd_pin: mmc0_cd_pin@0 { >>>> + allwinner,pins = "PF6"; >>>> + allwinner,function = "gpio_in"; >>>> + allwinner,drive = <SUN4I_PINCTRL_10_MA>; diff --git a/a/content_digest b/N2/content_digest index 64336d7..0bc8aeb 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -3,10 +3,22 @@ "ref\0CAGb2v64NZMw0vNvVtepthUMox5TDy07gTBAWZqf8GAq6TrMpOg@mail.gmail.com\0" "ref\0563614A3.6060805@gmail.com\0" "ref\020151123085719.GT32142@lukather\0" - "From\0hdegoede@redhat.com (Hans de Goede)\0" - "Subject\0[linux-sunxi] Re: [PATCH v4 5/6] ARM: dts: sunxi: Add Allwinner H3 DTSI\0" + "From\0Hans de Goede <hdegoede@redhat.com>\0" + "Subject\0Re: [linux-sunxi] Re: [PATCH v4 5/6] ARM: dts: sunxi: Add Allwinner H3 DTSI\0" "Date\0Mon, 23 Nov 2015 11:50:47 +0100\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0maxime.ripard@free-electrons.com" + " Jens Kuske <jenskuske@gmail.com>\0" + "Cc\0Chen-Yu Tsai <wens@csie.org>" + Michael Turquette <mturquette@baylibre.com> + Linus Walleij <linus.walleij@linaro.org> + Rob Herring <robh+dt@kernel.org> + Philipp Zabel <p.zabel@pengutronix.de> + " Emilio L\303\263pez <emilio@elopez.com.ar>" + Vishnu Patekar <vishnupatekar0510@gmail.com> + devicetree <devicetree@vger.kernel.org> + linux-arm-kernel <linux-arm-kernel@lists.infradead.org> + linux-kernel <linux-kernel@vger.kernel.org> + " linux-sunxi <linux-sunxi@googlegroups.com>\0" "\00:1\0" "b\0" "HI,\n" @@ -15,7 +27,7 @@ "> Hi,\n" ">\n" "> On Sun, Nov 01, 2015 at 02:33:23PM +0100, Jens Kuske wrote:\n" - ">>>> + bus_gates: clk at 01c20060 {\n" + ">>>> + bus_gates: clk@01c20060 {\n" ">>>> + #clock-cells = <1>;\n" ">>>> + compatible = \"allwinner,sun8i-h3-bus-gates-clk\";\n" ">>>> + reg = <0x01c20060 0x14>;\n" @@ -80,7 +92,7 @@ ">\n" ">>>> + };\n" ">>>> +\n" - ">>>> + mmc0_clk: clk at 01c20088 {\n" + ">>>> + mmc0_clk: clk@01c20088 {\n" ">>>> + #clock-cells = <1>;\n" ">>>> + compatible = \"allwinner,sun4i-a10-mmc-clk\";\n" ">>>> + reg = <0x01c20088 0x4>;\n" @@ -90,7 +102,7 @@ ">>>> + \"mmc0_sample\";\n" ">>>> + };\n" ">>>> +\n" - ">>>> + mmc1_clk: clk at 01c2008c {\n" + ">>>> + mmc1_clk: clk@01c2008c {\n" ">>>> + #clock-cells = <1>;\n" ">>>> + compatible = \"allwinner,sun4i-a10-mmc-clk\";\n" ">>>> + reg = <0x01c2008c 0x4>;\n" @@ -100,7 +112,7 @@ ">>>> + \"mmc1_sample\";\n" ">>>> + };\n" ">>>> +\n" - ">>>> + mmc2_clk: clk at 01c20090 {\n" + ">>>> + mmc2_clk: clk@01c20090 {\n" ">>>> + #clock-cells = <1>;\n" ">>>> + compatible = \"allwinner,sun4i-a10-mmc-clk\";\n" ">>>> + reg = <0x01c20090 0x4>;\n" @@ -110,7 +122,7 @@ ">>>> + \"mmc2_sample\";\n" ">>>> + };\n" ">>>> +\n" - ">>>> + mbus_clk: clk at 01c2015c {\n" + ">>>> + mbus_clk: clk@01c2015c {\n" ">>>> + #clock-cells = <0>;\n" ">>>> + compatible = \"allwinner,sun8i-a23-mbus-clk\";\n" ">>>> + reg = <0x01c2015c 0x4>;\n" @@ -125,7 +137,7 @@ ">>>> + #size-cells = <1>;\n" ">>>> + ranges;\n" ">>>> +\n" - ">>>> + dma: dma-controller at 01c02000 {\n" + ">>>> + dma: dma-controller@01c02000 {\n" ">>>> + compatible = \"allwinner,sun8i-h3-dma\";\n" ">>>> + reg = <0x01c02000 0x1000>;\n" ">>>> + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -134,7 +146,7 @@ ">>>> + #dma-cells = <1>;\n" ">>>> + };\n" ">>>> +\n" - ">>>> + mmc0: mmc at 01c0f000 {\n" + ">>>> + mmc0: mmc@01c0f000 {\n" ">>>> + compatible = \"allwinner,sun5i-a13-mmc\";\n" ">>>> + reg = <0x01c0f000 0x1000>;\n" ">>>> + clocks = <&bus_gates 8>,\n" @@ -153,7 +165,7 @@ ">>>> + #size-cells = <0>;\n" ">>>> + };\n" ">>>> +\n" - ">>>> + mmc1: mmc at 01c10000 {\n" + ">>>> + mmc1: mmc@01c10000 {\n" ">>>> + compatible = \"allwinner,sun5i-a13-mmc\";\n" ">>>> + reg = <0x01c10000 0x1000>;\n" ">>>> + clocks = <&bus_gates 9>,\n" @@ -172,7 +184,7 @@ ">>>> + #size-cells = <0>;\n" ">>>> + };\n" ">>>> +\n" - ">>>> + mmc2: mmc at 01c11000 {\n" + ">>>> + mmc2: mmc@01c11000 {\n" ">>>> + compatible = \"allwinner,sun5i-a13-mmc\";\n" ">>>> + reg = <0x01c11000 0x1000>;\n" ">>>> + clocks = <&bus_gates 10>,\n" @@ -191,7 +203,7 @@ ">>>> + #size-cells = <0>;\n" ">>>> + };\n" ">>>> +\n" - ">>>> + pio: pinctrl at 01c20800 {\n" + ">>>> + pio: pinctrl@01c20800 {\n" ">>>> + compatible = \"allwinner,sun8i-h3-pinctrl\";\n" ">>>> + reg = <0x01c20800 0x400>;\n" ">>>> + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,\n" @@ -202,14 +214,14 @@ ">>>> + interrupt-controller;\n" ">>>> + #interrupt-cells = <2>;\n" ">>>> +\n" - ">>>> + uart0_pins_a: uart0 at 0 {\n" + ">>>> + uart0_pins_a: uart0@0 {\n" ">>>> + allwinner,pins = \"PA4\", \"PA5\";\n" ">>>> + allwinner,function = \"uart0\";\n" ">>>> + allwinner,drive = <SUN4I_PINCTRL_10_MA>;\n" ">>>> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;\n" ">>>> + };\n" ">>>> +\n" - ">>>> + mmc0_pins_a: mmc0 at 0 {\n" + ">>>> + mmc0_pins_a: mmc0@0 {\n" ">>>> + allwinner,pins = \"PF0\", \"PF1\", \"PF2\", \"PF3\",\n" ">>>> + \"PF4\", \"PF5\";\n" ">>>> + allwinner,function = \"mmc0\";\n" @@ -217,7 +229,7 @@ ">>>> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;\n" ">>>> + };\n" ">>>> +\n" - ">>>> + mmc0_cd_pin: mmc0_cd_pin at 0 {\n" + ">>>> + mmc0_cd_pin: mmc0_cd_pin@0 {\n" ">>>> + allwinner,pins = \"PF6\";\n" ">>>> + allwinner,function = \"gpio_in\";\n" ">>>> + allwinner,drive = <SUN4I_PINCTRL_10_MA>;\n" @@ -250,4 +262,4 @@ "\n" Hans -0193cb992e31e6dd86de4f1ce0115325279a44d9e0412913fead62fcceb14d6e +da3cdc2237c9b4e0997c5ed690ab50670671f9e5ce5271fd8ee52f1ccc7f9ff8
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