diff for duplicates of <56533E02.6020807@gmail.com> diff --git a/a/1.txt b/N1/1.txt index dc41b49..8903c44 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -5,7 +5,7 @@ On 23/11/15 11:50, Hans de Goede wrote: >> Hi, >> >> On Sun, Nov 01, 2015 at 02:33:23PM +0100, Jens Kuske wrote: ->>>>> + bus_gates: clk at 01c20060 { +>>>>> + bus_gates: clk@01c20060 { >>>>> + #clock-cells = <1>; >>>>> + compatible = "allwinner,sun8i-h3-bus-gates-clk"; >>>>> + reg = <0x01c20060 0x14>; @@ -70,7 +70,7 @@ On 23/11/15 11:50, Hans de Goede wrote: >> >>>>> + }; >>>>> + ->>>>> + mmc0_clk: clk at 01c20088 { +>>>>> + mmc0_clk: clk@01c20088 { >>>>> + #clock-cells = <1>; >>>>> + compatible = "allwinner,sun4i-a10-mmc-clk"; >>>>> + reg = <0x01c20088 0x4>; @@ -80,7 +80,7 @@ On 23/11/15 11:50, Hans de Goede wrote: >>>>> + "mmc0_sample"; >>>>> + }; >>>>> + ->>>>> + mmc1_clk: clk at 01c2008c { +>>>>> + mmc1_clk: clk@01c2008c { >>>>> + #clock-cells = <1>; >>>>> + compatible = "allwinner,sun4i-a10-mmc-clk"; >>>>> + reg = <0x01c2008c 0x4>; @@ -90,7 +90,7 @@ On 23/11/15 11:50, Hans de Goede wrote: >>>>> + "mmc1_sample"; >>>>> + }; >>>>> + ->>>>> + mmc2_clk: clk at 01c20090 { +>>>>> + mmc2_clk: clk@01c20090 { >>>>> + #clock-cells = <1>; >>>>> + compatible = "allwinner,sun4i-a10-mmc-clk"; >>>>> + reg = <0x01c20090 0x4>; @@ -100,7 +100,7 @@ On 23/11/15 11:50, Hans de Goede wrote: >>>>> + "mmc2_sample"; >>>>> + }; >>>>> + ->>>>> + mbus_clk: clk at 01c2015c { +>>>>> + mbus_clk: clk@01c2015c { >>>>> + #clock-cells = <0>; >>>>> + compatible = "allwinner,sun8i-a23-mbus-clk"; >>>>> + reg = <0x01c2015c 0x4>; @@ -115,7 +115,7 @@ On 23/11/15 11:50, Hans de Goede wrote: >>>>> + #size-cells = <1>; >>>>> + ranges; >>>>> + ->>>>> + dma: dma-controller at 01c02000 { +>>>>> + dma: dma-controller@01c02000 { >>>>> + compatible = "allwinner,sun8i-h3-dma"; >>>>> + reg = <0x01c02000 0x1000>; >>>>> + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; @@ -124,7 +124,7 @@ On 23/11/15 11:50, Hans de Goede wrote: >>>>> + #dma-cells = <1>; >>>>> + }; >>>>> + ->>>>> + mmc0: mmc at 01c0f000 { +>>>>> + mmc0: mmc@01c0f000 { >>>>> + compatible = "allwinner,sun5i-a13-mmc"; >>>>> + reg = <0x01c0f000 0x1000>; >>>>> + clocks = <&bus_gates 8>, @@ -143,7 +143,7 @@ On 23/11/15 11:50, Hans de Goede wrote: >>>>> + #size-cells = <0>; >>>>> + }; >>>>> + ->>>>> + mmc1: mmc at 01c10000 { +>>>>> + mmc1: mmc@01c10000 { >>>>> + compatible = "allwinner,sun5i-a13-mmc"; >>>>> + reg = <0x01c10000 0x1000>; >>>>> + clocks = <&bus_gates 9>, @@ -162,7 +162,7 @@ On 23/11/15 11:50, Hans de Goede wrote: >>>>> + #size-cells = <0>; >>>>> + }; >>>>> + ->>>>> + mmc2: mmc at 01c11000 { +>>>>> + mmc2: mmc@01c11000 { >>>>> + compatible = "allwinner,sun5i-a13-mmc"; >>>>> + reg = <0x01c11000 0x1000>; >>>>> + clocks = <&bus_gates 10>, @@ -181,7 +181,7 @@ On 23/11/15 11:50, Hans de Goede wrote: >>>>> + #size-cells = <0>; >>>>> + }; >>>>> + ->>>>> + pio: pinctrl at 01c20800 { +>>>>> + pio: pinctrl@01c20800 { >>>>> + compatible = "allwinner,sun8i-h3-pinctrl"; >>>>> + reg = <0x01c20800 0x400>; >>>>> + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, @@ -192,14 +192,14 @@ On 23/11/15 11:50, Hans de Goede wrote: >>>>> + interrupt-controller; >>>>> + #interrupt-cells = <2>; >>>>> + ->>>>> + uart0_pins_a: uart0 at 0 { +>>>>> + uart0_pins_a: uart0@0 { >>>>> + allwinner,pins = "PA4", "PA5"; >>>>> + allwinner,function = "uart0"; >>>>> + allwinner,drive = <SUN4I_PINCTRL_10_MA>; >>>>> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; >>>>> + }; >>>>> + ->>>>> + mmc0_pins_a: mmc0 at 0 { +>>>>> + mmc0_pins_a: mmc0@0 { >>>>> + allwinner,pins = "PF0", "PF1", "PF2", "PF3", >>>>> + "PF4", "PF5"; >>>>> + allwinner,function = "mmc0"; @@ -207,7 +207,7 @@ On 23/11/15 11:50, Hans de Goede wrote: >>>>> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; >>>>> + }; >>>>> + ->>>>> + mmc0_cd_pin: mmc0_cd_pin at 0 { +>>>>> + mmc0_cd_pin: mmc0_cd_pin@0 { >>>>> + allwinner,pins = "PF6"; >>>>> + allwinner,function = "gpio_in"; >>>>> + allwinner,drive = <SUN4I_PINCTRL_10_MA>; diff --git a/a/content_digest b/N1/content_digest index 495efa7..afda5e7 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -4,10 +4,23 @@ "ref\0563614A3.6060805@gmail.com\0" "ref\020151123085719.GT32142@lukather\0" "ref\05652EF87.50604@redhat.com\0" - "From\0jenskuske@gmail.com (Jens Kuske)\0" - "Subject\0[linux-sunxi] Re: [PATCH v4 5/6] ARM: dts: sunxi: Add Allwinner H3 DTSI\0" + "ref\05652EF87.50604-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org\0" + "From\0Jens Kuske <jenskuske-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0" + "Subject\0Re: Re: [PATCH v4 5/6] ARM: dts: sunxi: Add Allwinner H3 DTSI\0" "Date\0Mon, 23 Nov 2015 17:25:38 +0100\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Hans de Goede <hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>" + " maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org\0" + "Cc\0Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>" + Michael Turquette <mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org> + Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> + Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> + Philipp Zabel <p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> + " Emilio L\303\263pez <emilio-0Z03zUJReD5OxF6Tv1QG9Q@public.gmane.org>" + Vishnu Patekar <vishnupatekar0510-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> + devicetree <devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> + linux-arm-kernel <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org> + linux-kernel <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> + " linux-sunxi <linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org>\0" "\00:1\0" "b\0" "On 23/11/15 11:50, Hans de Goede wrote:\n" @@ -17,7 +30,7 @@ ">> Hi,\n" ">>\n" ">> On Sun, Nov 01, 2015 at 02:33:23PM +0100, Jens Kuske wrote:\n" - ">>>>> + bus_gates: clk at 01c20060 {\n" + ">>>>> + bus_gates: clk@01c20060 {\n" ">>>>> + #clock-cells = <1>;\n" ">>>>> + compatible = \"allwinner,sun8i-h3-bus-gates-clk\";\n" ">>>>> + reg = <0x01c20060 0x14>;\n" @@ -82,7 +95,7 @@ ">>\n" ">>>>> + };\n" ">>>>> +\n" - ">>>>> + mmc0_clk: clk at 01c20088 {\n" + ">>>>> + mmc0_clk: clk@01c20088 {\n" ">>>>> + #clock-cells = <1>;\n" ">>>>> + compatible = \"allwinner,sun4i-a10-mmc-clk\";\n" ">>>>> + reg = <0x01c20088 0x4>;\n" @@ -92,7 +105,7 @@ ">>>>> + \"mmc0_sample\";\n" ">>>>> + };\n" ">>>>> +\n" - ">>>>> + mmc1_clk: clk at 01c2008c {\n" + ">>>>> + mmc1_clk: clk@01c2008c {\n" ">>>>> + #clock-cells = <1>;\n" ">>>>> + compatible = \"allwinner,sun4i-a10-mmc-clk\";\n" ">>>>> + reg = <0x01c2008c 0x4>;\n" @@ -102,7 +115,7 @@ ">>>>> + \"mmc1_sample\";\n" ">>>>> + };\n" ">>>>> +\n" - ">>>>> + mmc2_clk: clk at 01c20090 {\n" + ">>>>> + mmc2_clk: clk@01c20090 {\n" ">>>>> + #clock-cells = <1>;\n" ">>>>> + compatible = \"allwinner,sun4i-a10-mmc-clk\";\n" ">>>>> + reg = <0x01c20090 0x4>;\n" @@ -112,7 +125,7 @@ ">>>>> + \"mmc2_sample\";\n" ">>>>> + };\n" ">>>>> +\n" - ">>>>> + mbus_clk: clk at 01c2015c {\n" + ">>>>> + mbus_clk: clk@01c2015c {\n" ">>>>> + #clock-cells = <0>;\n" ">>>>> + compatible = \"allwinner,sun8i-a23-mbus-clk\";\n" ">>>>> + reg = <0x01c2015c 0x4>;\n" @@ -127,7 +140,7 @@ ">>>>> + #size-cells = <1>;\n" ">>>>> + ranges;\n" ">>>>> +\n" - ">>>>> + dma: dma-controller at 01c02000 {\n" + ">>>>> + dma: dma-controller@01c02000 {\n" ">>>>> + compatible = \"allwinner,sun8i-h3-dma\";\n" ">>>>> + reg = <0x01c02000 0x1000>;\n" ">>>>> + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -136,7 +149,7 @@ ">>>>> + #dma-cells = <1>;\n" ">>>>> + };\n" ">>>>> +\n" - ">>>>> + mmc0: mmc at 01c0f000 {\n" + ">>>>> + mmc0: mmc@01c0f000 {\n" ">>>>> + compatible = \"allwinner,sun5i-a13-mmc\";\n" ">>>>> + reg = <0x01c0f000 0x1000>;\n" ">>>>> + clocks = <&bus_gates 8>,\n" @@ -155,7 +168,7 @@ ">>>>> + #size-cells = <0>;\n" ">>>>> + };\n" ">>>>> +\n" - ">>>>> + mmc1: mmc at 01c10000 {\n" + ">>>>> + mmc1: mmc@01c10000 {\n" ">>>>> + compatible = \"allwinner,sun5i-a13-mmc\";\n" ">>>>> + reg = <0x01c10000 0x1000>;\n" ">>>>> + clocks = <&bus_gates 9>,\n" @@ -174,7 +187,7 @@ ">>>>> + #size-cells = <0>;\n" ">>>>> + };\n" ">>>>> +\n" - ">>>>> + mmc2: mmc at 01c11000 {\n" + ">>>>> + mmc2: mmc@01c11000 {\n" ">>>>> + compatible = \"allwinner,sun5i-a13-mmc\";\n" ">>>>> + reg = <0x01c11000 0x1000>;\n" ">>>>> + clocks = <&bus_gates 10>,\n" @@ -193,7 +206,7 @@ ">>>>> + #size-cells = <0>;\n" ">>>>> + };\n" ">>>>> +\n" - ">>>>> + pio: pinctrl at 01c20800 {\n" + ">>>>> + pio: pinctrl@01c20800 {\n" ">>>>> + compatible = \"allwinner,sun8i-h3-pinctrl\";\n" ">>>>> + reg = <0x01c20800 0x400>;\n" ">>>>> + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,\n" @@ -204,14 +217,14 @@ ">>>>> + interrupt-controller;\n" ">>>>> + #interrupt-cells = <2>;\n" ">>>>> +\n" - ">>>>> + uart0_pins_a: uart0 at 0 {\n" + ">>>>> + uart0_pins_a: uart0@0 {\n" ">>>>> + allwinner,pins = \"PA4\", \"PA5\";\n" ">>>>> + allwinner,function = \"uart0\";\n" ">>>>> + allwinner,drive = <SUN4I_PINCTRL_10_MA>;\n" ">>>>> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;\n" ">>>>> + };\n" ">>>>> +\n" - ">>>>> + mmc0_pins_a: mmc0 at 0 {\n" + ">>>>> + mmc0_pins_a: mmc0@0 {\n" ">>>>> + allwinner,pins = \"PF0\", \"PF1\", \"PF2\", \"PF3\",\n" ">>>>> + \"PF4\", \"PF5\";\n" ">>>>> + allwinner,function = \"mmc0\";\n" @@ -219,7 +232,7 @@ ">>>>> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;\n" ">>>>> + };\n" ">>>>> +\n" - ">>>>> + mmc0_cd_pin: mmc0_cd_pin at 0 {\n" + ">>>>> + mmc0_cd_pin: mmc0_cd_pin@0 {\n" ">>>>> + allwinner,pins = \"PF6\";\n" ">>>>> + allwinner,function = \"gpio_in\";\n" ">>>>> + allwinner,drive = <SUN4I_PINCTRL_10_MA>;\n" @@ -257,4 +270,4 @@ "\n" Jens -95c7cec26fa355e1f94d296cd310a730edd65d0af29872c50501c87a47228ee8 +8c4d309cc86ff864eec061375e527256297b6f9f6c0f8466ee2d86580871fec2
diff --git a/a/1.txt b/N2/1.txt index dc41b49..8903c44 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -5,7 +5,7 @@ On 23/11/15 11:50, Hans de Goede wrote: >> Hi, >> >> On Sun, Nov 01, 2015 at 02:33:23PM +0100, Jens Kuske wrote: ->>>>> + bus_gates: clk at 01c20060 { +>>>>> + bus_gates: clk@01c20060 { >>>>> + #clock-cells = <1>; >>>>> + compatible = "allwinner,sun8i-h3-bus-gates-clk"; >>>>> + reg = <0x01c20060 0x14>; @@ -70,7 +70,7 @@ On 23/11/15 11:50, Hans de Goede wrote: >> >>>>> + }; >>>>> + ->>>>> + mmc0_clk: clk at 01c20088 { +>>>>> + mmc0_clk: clk@01c20088 { >>>>> + #clock-cells = <1>; >>>>> + compatible = "allwinner,sun4i-a10-mmc-clk"; >>>>> + reg = <0x01c20088 0x4>; @@ -80,7 +80,7 @@ On 23/11/15 11:50, Hans de Goede wrote: >>>>> + "mmc0_sample"; >>>>> + }; >>>>> + ->>>>> + mmc1_clk: clk at 01c2008c { +>>>>> + mmc1_clk: clk@01c2008c { >>>>> + #clock-cells = <1>; >>>>> + compatible = "allwinner,sun4i-a10-mmc-clk"; >>>>> + reg = <0x01c2008c 0x4>; @@ -90,7 +90,7 @@ On 23/11/15 11:50, Hans de Goede wrote: >>>>> + "mmc1_sample"; >>>>> + }; >>>>> + ->>>>> + mmc2_clk: clk at 01c20090 { +>>>>> + mmc2_clk: clk@01c20090 { >>>>> + #clock-cells = <1>; >>>>> + compatible = "allwinner,sun4i-a10-mmc-clk"; >>>>> + reg = <0x01c20090 0x4>; @@ -100,7 +100,7 @@ On 23/11/15 11:50, Hans de Goede wrote: >>>>> + "mmc2_sample"; >>>>> + }; >>>>> + ->>>>> + mbus_clk: clk at 01c2015c { +>>>>> + mbus_clk: clk@01c2015c { >>>>> + #clock-cells = <0>; >>>>> + compatible = "allwinner,sun8i-a23-mbus-clk"; >>>>> + reg = <0x01c2015c 0x4>; @@ -115,7 +115,7 @@ On 23/11/15 11:50, Hans de Goede wrote: >>>>> + #size-cells = <1>; >>>>> + ranges; >>>>> + ->>>>> + dma: dma-controller at 01c02000 { +>>>>> + dma: dma-controller@01c02000 { >>>>> + compatible = "allwinner,sun8i-h3-dma"; >>>>> + reg = <0x01c02000 0x1000>; >>>>> + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; @@ -124,7 +124,7 @@ On 23/11/15 11:50, Hans de Goede wrote: >>>>> + #dma-cells = <1>; >>>>> + }; >>>>> + ->>>>> + mmc0: mmc at 01c0f000 { +>>>>> + mmc0: mmc@01c0f000 { >>>>> + compatible = "allwinner,sun5i-a13-mmc"; >>>>> + reg = <0x01c0f000 0x1000>; >>>>> + clocks = <&bus_gates 8>, @@ -143,7 +143,7 @@ On 23/11/15 11:50, Hans de Goede wrote: >>>>> + #size-cells = <0>; >>>>> + }; >>>>> + ->>>>> + mmc1: mmc at 01c10000 { +>>>>> + mmc1: mmc@01c10000 { >>>>> + compatible = "allwinner,sun5i-a13-mmc"; >>>>> + reg = <0x01c10000 0x1000>; >>>>> + clocks = <&bus_gates 9>, @@ -162,7 +162,7 @@ On 23/11/15 11:50, Hans de Goede wrote: >>>>> + #size-cells = <0>; >>>>> + }; >>>>> + ->>>>> + mmc2: mmc at 01c11000 { +>>>>> + mmc2: mmc@01c11000 { >>>>> + compatible = "allwinner,sun5i-a13-mmc"; >>>>> + reg = <0x01c11000 0x1000>; >>>>> + clocks = <&bus_gates 10>, @@ -181,7 +181,7 @@ On 23/11/15 11:50, Hans de Goede wrote: >>>>> + #size-cells = <0>; >>>>> + }; >>>>> + ->>>>> + pio: pinctrl at 01c20800 { +>>>>> + pio: pinctrl@01c20800 { >>>>> + compatible = "allwinner,sun8i-h3-pinctrl"; >>>>> + reg = <0x01c20800 0x400>; >>>>> + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, @@ -192,14 +192,14 @@ On 23/11/15 11:50, Hans de Goede wrote: >>>>> + interrupt-controller; >>>>> + #interrupt-cells = <2>; >>>>> + ->>>>> + uart0_pins_a: uart0 at 0 { +>>>>> + uart0_pins_a: uart0@0 { >>>>> + allwinner,pins = "PA4", "PA5"; >>>>> + allwinner,function = "uart0"; >>>>> + allwinner,drive = <SUN4I_PINCTRL_10_MA>; >>>>> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; >>>>> + }; >>>>> + ->>>>> + mmc0_pins_a: mmc0 at 0 { +>>>>> + mmc0_pins_a: mmc0@0 { >>>>> + allwinner,pins = "PF0", "PF1", "PF2", "PF3", >>>>> + "PF4", "PF5"; >>>>> + allwinner,function = "mmc0"; @@ -207,7 +207,7 @@ On 23/11/15 11:50, Hans de Goede wrote: >>>>> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; >>>>> + }; >>>>> + ->>>>> + mmc0_cd_pin: mmc0_cd_pin at 0 { +>>>>> + mmc0_cd_pin: mmc0_cd_pin@0 { >>>>> + allwinner,pins = "PF6"; >>>>> + allwinner,function = "gpio_in"; >>>>> + allwinner,drive = <SUN4I_PINCTRL_10_MA>; diff --git a/a/content_digest b/N2/content_digest index 495efa7..73f2e05 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -4,10 +4,22 @@ "ref\0563614A3.6060805@gmail.com\0" "ref\020151123085719.GT32142@lukather\0" "ref\05652EF87.50604@redhat.com\0" - "From\0jenskuske@gmail.com (Jens Kuske)\0" - "Subject\0[linux-sunxi] Re: [PATCH v4 5/6] ARM: dts: sunxi: Add Allwinner H3 DTSI\0" + "From\0Jens Kuske <jenskuske@gmail.com>\0" + "Subject\0Re: [linux-sunxi] Re: [PATCH v4 5/6] ARM: dts: sunxi: Add Allwinner H3 DTSI\0" "Date\0Mon, 23 Nov 2015 17:25:38 +0100\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Hans de Goede <hdegoede@redhat.com>" + " maxime.ripard@free-electrons.com\0" + "Cc\0Chen-Yu Tsai <wens@csie.org>" + Michael Turquette <mturquette@baylibre.com> + Linus Walleij <linus.walleij@linaro.org> + Rob Herring <robh+dt@kernel.org> + Philipp Zabel <p.zabel@pengutronix.de> + " Emilio L\303\263pez <emilio@elopez.com.ar>" + Vishnu Patekar <vishnupatekar0510@gmail.com> + devicetree <devicetree@vger.kernel.org> + linux-arm-kernel <linux-arm-kernel@lists.infradead.org> + linux-kernel <linux-kernel@vger.kernel.org> + " linux-sunxi <linux-sunxi@googlegroups.com>\0" "\00:1\0" "b\0" "On 23/11/15 11:50, Hans de Goede wrote:\n" @@ -17,7 +29,7 @@ ">> Hi,\n" ">>\n" ">> On Sun, Nov 01, 2015 at 02:33:23PM +0100, Jens Kuske wrote:\n" - ">>>>> + bus_gates: clk at 01c20060 {\n" + ">>>>> + bus_gates: clk@01c20060 {\n" ">>>>> + #clock-cells = <1>;\n" ">>>>> + compatible = \"allwinner,sun8i-h3-bus-gates-clk\";\n" ">>>>> + reg = <0x01c20060 0x14>;\n" @@ -82,7 +94,7 @@ ">>\n" ">>>>> + };\n" ">>>>> +\n" - ">>>>> + mmc0_clk: clk at 01c20088 {\n" + ">>>>> + mmc0_clk: clk@01c20088 {\n" ">>>>> + #clock-cells = <1>;\n" ">>>>> + compatible = \"allwinner,sun4i-a10-mmc-clk\";\n" ">>>>> + reg = <0x01c20088 0x4>;\n" @@ -92,7 +104,7 @@ ">>>>> + \"mmc0_sample\";\n" ">>>>> + };\n" ">>>>> +\n" - ">>>>> + mmc1_clk: clk at 01c2008c {\n" + ">>>>> + mmc1_clk: clk@01c2008c {\n" ">>>>> + #clock-cells = <1>;\n" ">>>>> + compatible = \"allwinner,sun4i-a10-mmc-clk\";\n" ">>>>> + reg = <0x01c2008c 0x4>;\n" @@ -102,7 +114,7 @@ ">>>>> + \"mmc1_sample\";\n" ">>>>> + };\n" ">>>>> +\n" - ">>>>> + mmc2_clk: clk at 01c20090 {\n" + ">>>>> + mmc2_clk: clk@01c20090 {\n" ">>>>> + #clock-cells = <1>;\n" ">>>>> + compatible = \"allwinner,sun4i-a10-mmc-clk\";\n" ">>>>> + reg = <0x01c20090 0x4>;\n" @@ -112,7 +124,7 @@ ">>>>> + \"mmc2_sample\";\n" ">>>>> + };\n" ">>>>> +\n" - ">>>>> + mbus_clk: clk at 01c2015c {\n" + ">>>>> + mbus_clk: clk@01c2015c {\n" ">>>>> + #clock-cells = <0>;\n" ">>>>> + compatible = \"allwinner,sun8i-a23-mbus-clk\";\n" ">>>>> + reg = <0x01c2015c 0x4>;\n" @@ -127,7 +139,7 @@ ">>>>> + #size-cells = <1>;\n" ">>>>> + ranges;\n" ">>>>> +\n" - ">>>>> + dma: dma-controller at 01c02000 {\n" + ">>>>> + dma: dma-controller@01c02000 {\n" ">>>>> + compatible = \"allwinner,sun8i-h3-dma\";\n" ">>>>> + reg = <0x01c02000 0x1000>;\n" ">>>>> + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -136,7 +148,7 @@ ">>>>> + #dma-cells = <1>;\n" ">>>>> + };\n" ">>>>> +\n" - ">>>>> + mmc0: mmc at 01c0f000 {\n" + ">>>>> + mmc0: mmc@01c0f000 {\n" ">>>>> + compatible = \"allwinner,sun5i-a13-mmc\";\n" ">>>>> + reg = <0x01c0f000 0x1000>;\n" ">>>>> + clocks = <&bus_gates 8>,\n" @@ -155,7 +167,7 @@ ">>>>> + #size-cells = <0>;\n" ">>>>> + };\n" ">>>>> +\n" - ">>>>> + mmc1: mmc at 01c10000 {\n" + ">>>>> + mmc1: mmc@01c10000 {\n" ">>>>> + compatible = \"allwinner,sun5i-a13-mmc\";\n" ">>>>> + reg = <0x01c10000 0x1000>;\n" ">>>>> + clocks = <&bus_gates 9>,\n" @@ -174,7 +186,7 @@ ">>>>> + #size-cells = <0>;\n" ">>>>> + };\n" ">>>>> +\n" - ">>>>> + mmc2: mmc at 01c11000 {\n" + ">>>>> + mmc2: mmc@01c11000 {\n" ">>>>> + compatible = \"allwinner,sun5i-a13-mmc\";\n" ">>>>> + reg = <0x01c11000 0x1000>;\n" ">>>>> + clocks = <&bus_gates 10>,\n" @@ -193,7 +205,7 @@ ">>>>> + #size-cells = <0>;\n" ">>>>> + };\n" ">>>>> +\n" - ">>>>> + pio: pinctrl at 01c20800 {\n" + ">>>>> + pio: pinctrl@01c20800 {\n" ">>>>> + compatible = \"allwinner,sun8i-h3-pinctrl\";\n" ">>>>> + reg = <0x01c20800 0x400>;\n" ">>>>> + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,\n" @@ -204,14 +216,14 @@ ">>>>> + interrupt-controller;\n" ">>>>> + #interrupt-cells = <2>;\n" ">>>>> +\n" - ">>>>> + uart0_pins_a: uart0 at 0 {\n" + ">>>>> + uart0_pins_a: uart0@0 {\n" ">>>>> + allwinner,pins = \"PA4\", \"PA5\";\n" ">>>>> + allwinner,function = \"uart0\";\n" ">>>>> + allwinner,drive = <SUN4I_PINCTRL_10_MA>;\n" ">>>>> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;\n" ">>>>> + };\n" ">>>>> +\n" - ">>>>> + mmc0_pins_a: mmc0 at 0 {\n" + ">>>>> + mmc0_pins_a: mmc0@0 {\n" ">>>>> + allwinner,pins = \"PF0\", \"PF1\", \"PF2\", \"PF3\",\n" ">>>>> + \"PF4\", \"PF5\";\n" ">>>>> + allwinner,function = \"mmc0\";\n" @@ -219,7 +231,7 @@ ">>>>> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;\n" ">>>>> + };\n" ">>>>> +\n" - ">>>>> + mmc0_cd_pin: mmc0_cd_pin at 0 {\n" + ">>>>> + mmc0_cd_pin: mmc0_cd_pin@0 {\n" ">>>>> + allwinner,pins = \"PF6\";\n" ">>>>> + allwinner,function = \"gpio_in\";\n" ">>>>> + allwinner,drive = <SUN4I_PINCTRL_10_MA>;\n" @@ -257,4 +269,4 @@ "\n" Jens -95c7cec26fa355e1f94d296cd310a730edd65d0af29872c50501c87a47228ee8 +21cfd7b5495f47faeab201fba38bfd3b96feb883b58a13b1025703e91eba7433
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