From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Message-ID: <56540880.6010601@rock-chips.com> Date: Tue, 24 Nov 2015 14:49:36 +0800 From: Xing Zheng MIME-Version: 1.0 To: =?UTF-8?B?SGVpa28gU3TDvGJuZXI=?= CC: linux-rockchip@lists.infradead.org, kmixter@google.com, benchan@google.com, devicetree@vger.kernel.org, Michael Turquette , Stephen Boyd , Kumar Gala , linux-kernel@vger.kernel.org, Ian Campbell , Rob Herring , Pawel Moll , Mark Rutland , Russell King , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v7 0/6] Build and support rk3036 SoC platform References: <1446708840-12038-1-git-send-email-zhengxing@rock-chips.com> <1518219.zj9d8yfxJz@diego> In-Reply-To: <1518219.zj9d8yfxJz@diego> Content-Type: text/plain; charset=UTF-8; format=flowed List-ID: OK, Thanks Heiko. :-) On 2015年11月24日 08:03, Heiko Stübner wrote: > Hi Xing Zheng, > > Am Donnerstag, 5. November 2015, 15:33:54 schrieb Xing Zheng: >> Hi, >> We need to support rk3036 soc platform via upstream, there are >> some primary parts for the initial release of minimum system: dts, >> clk-pll, smp, and clock tree for rk3036, and additional, we can use >> these startup and run to init processs. > [...] > > after talking with Mike and agreeing that I'm again taking the regular > clock patches to them, I've applied all of this to appropriate branches. > I did some cosmetics, as explained below. > > >> Xing Zheng (6): >> dt-bindings: add documentation of rk3036 clock controller >> clk: rockchip: add dt-binding header for rk3036 >> clk: rockchip: add new pll-type for rk3036 and similar socs > - wrapped some overly long lines, otherwise this is similar to what > Stephen already took for the rk3066-pll-type. > > >> clk: rockchip: add clock controller for rk3036 >> ARM: dts: rockchip: add core rk3036 dts > - split off the evb into a separate patch > - reordered some nodes (please order by the address (the @xxxxxxxx) > - reordered some properties > - fixed the gic cpu masks > > >> ARM: dts: enable smp for rk3036 > folded into the core dtsi addition > > > Please take a final look at [0] to make sure I didn't mess up anything. > > > Thanks > Heiko > > > [0] > https://git.kernel.org/cgit/linux/kernel/git/mmind/linux-rockchip.git/log/?h=v4.5-clk/next > https://git.kernel.org/cgit/linux/kernel/git/mmind/linux-rockchip.git/log/?h=v4.5-armsoc/dts32 > > > From mboxrd@z Thu Jan 1 00:00:00 1970 From: Xing Zheng Subject: Re: [PATCH v7 0/6] Build and support rk3036 SoC platform Date: Tue, 24 Nov 2015 14:49:36 +0800 Message-ID: <56540880.6010601@rock-chips.com> References: <1446708840-12038-1-git-send-email-zhengxing@rock-chips.com> <1518219.zj9d8yfxJz@diego> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; Format="flowed" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1518219.zj9d8yfxJz@diego> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+glpar-linux-rockchip=m.gmane.org-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org To: =?UTF-8?B?SGVpa28gU3TDvGJuZXI=?= Cc: Mark Rutland , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Russell King , Pawel Moll , Ian Campbell , kmixter-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org, Stephen Boyd , linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Rob Herring , Kumar Gala , Michael Turquette , linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, benchan-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org List-Id: linux-rockchip.vger.kernel.org T0ssIFRoYW5rcyBIZWlrby4gOi0pCgpPbiAyMDE15bm0MTHmnIgyNOaXpSAwODowMywgSGVpa28g U3TDvGJuZXIgd3JvdGU6Cj4gSGkgWGluZyBaaGVuZywKPgo+IEFtIERvbm5lcnN0YWcsIDUuIE5v dmVtYmVyIDIwMTUsIDE1OjMzOjU0IHNjaHJpZWIgWGluZyBaaGVuZzoKPj4gSGksCj4+ICAgIFdl IG5lZWQgdG8gc3VwcG9ydCByazMwMzYgc29jIHBsYXRmb3JtIHZpYSB1cHN0cmVhbSwgdGhlcmUg YXJlCj4+IHNvbWUgcHJpbWFyeSBwYXJ0cyBmb3IgdGhlIGluaXRpYWwgcmVsZWFzZSBvZiBtaW5p bXVtIHN5c3RlbTogZHRzLAo+PiBjbGstcGxsLCBzbXAsIGFuZCBjbG9jayB0cmVlIGZvciByazMw MzYsIGFuZCBhZGRpdGlvbmFsLCB3ZSBjYW4gdXNlCj4+IHRoZXNlIHN0YXJ0dXAgYW5kIHJ1biB0 byBpbml0IHByb2Nlc3NzLgo+IFsuLi5dCj4KPiBhZnRlciB0YWxraW5nIHdpdGggTWlrZSBhbmQg YWdyZWVpbmcgdGhhdCBJJ20gYWdhaW4gdGFraW5nIHRoZSByZWd1bGFyCj4gY2xvY2sgcGF0Y2hl cyB0byB0aGVtLCBJJ3ZlIGFwcGxpZWQgYWxsIG9mIHRoaXMgdG8gYXBwcm9wcmlhdGUgYnJhbmNo ZXMuCj4gSSBkaWQgc29tZSBjb3NtZXRpY3MsIGFzIGV4cGxhaW5lZCBiZWxvdy4KPgo+Cj4+IFhp bmcgWmhlbmcgKDYpOgo+PiAgICBkdC1iaW5kaW5nczogYWRkIGRvY3VtZW50YXRpb24gb2Ygcmsz MDM2IGNsb2NrIGNvbnRyb2xsZXIKPj4gICAgY2xrOiByb2NrY2hpcDogYWRkIGR0LWJpbmRpbmcg aGVhZGVyIGZvciByazMwMzYKPj4gICAgY2xrOiByb2NrY2hpcDogYWRkIG5ldyBwbGwtdHlwZSBm b3IgcmszMDM2IGFuZCBzaW1pbGFyIHNvY3MKPiAtIHdyYXBwZWQgc29tZSBvdmVybHkgbG9uZyBs aW5lcywgb3RoZXJ3aXNlIHRoaXMgaXMgc2ltaWxhciB0byB3aGF0Cj4gICAgU3RlcGhlbiBhbHJl YWR5IHRvb2sgZm9yIHRoZSByazMwNjYtcGxsLXR5cGUuCj4KPgo+PiAgICBjbGs6IHJvY2tjaGlw OiBhZGQgY2xvY2sgY29udHJvbGxlciBmb3IgcmszMDM2Cj4+ICAgIEFSTTogZHRzOiByb2NrY2hp cDogYWRkIGNvcmUgcmszMDM2IGR0cwo+IC0gc3BsaXQgb2ZmIHRoZSBldmIgaW50byBhIHNlcGFy YXRlIHBhdGNoCj4gLSByZW9yZGVyZWQgc29tZSBub2RlcyAocGxlYXNlIG9yZGVyIGJ5IHRoZSBh ZGRyZXNzICh0aGUgQHh4eHh4eHh4KQo+IC0gcmVvcmRlcmVkIHNvbWUgcHJvcGVydGllcwo+IC0g Zml4ZWQgdGhlIGdpYyBjcHUgbWFza3MKPgo+Cj4+ICAgIEFSTTogZHRzOiBlbmFibGUgc21wIGZv ciByazMwMzYKPiBmb2xkZWQgaW50byB0aGUgY29yZSBkdHNpIGFkZGl0aW9uCj4KPgo+IFBsZWFz ZSB0YWtlIGEgZmluYWwgbG9vayBhdCBbMF0gdG8gbWFrZSBzdXJlIEkgZGlkbid0IG1lc3MgdXAg YW55dGhpbmcuCj4KPgo+IFRoYW5rcwo+IEhlaWtvCj4KPgo+IFswXQo+IGh0dHBzOi8vZ2l0Lmtl cm5lbC5vcmcvY2dpdC9saW51eC9rZXJuZWwvZ2l0L21taW5kL2xpbnV4LXJvY2tjaGlwLmdpdC9s b2cvP2g9djQuNS1jbGsvbmV4dAo+IGh0dHBzOi8vZ2l0Lmtlcm5lbC5vcmcvY2dpdC9saW51eC9r ZXJuZWwvZ2l0L21taW5kL2xpbnV4LXJvY2tjaGlwLmdpdC9sb2cvP2g9djQuNS1hcm1zb2MvZHRz MzIKPgo+Cj4KCgoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X18KTGludXgtcm9ja2NoaXAgbWFpbGluZyBsaXN0CkxpbnV4LXJvY2tjaGlwQGxpc3RzLmluZnJh ZGVhZC5vcmcKaHR0cDovL2xpc3RzLmluZnJhZGVhZC5vcmcvbWFpbG1hbi9saXN0aW5mby9saW51 eC1yb2NrY2hpcAo= From mboxrd@z Thu Jan 1 00:00:00 1970 From: zhengxing@rock-chips.com (Xing Zheng) Date: Tue, 24 Nov 2015 14:49:36 +0800 Subject: [PATCH v7 0/6] Build and support rk3036 SoC platform In-Reply-To: <1518219.zj9d8yfxJz@diego> References: <1446708840-12038-1-git-send-email-zhengxing@rock-chips.com> <1518219.zj9d8yfxJz@diego> Message-ID: <56540880.6010601@rock-chips.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org OK, Thanks Heiko. :-) On 2015?11?24? 08:03, Heiko St?bner wrote: > Hi Xing Zheng, > > Am Donnerstag, 5. November 2015, 15:33:54 schrieb Xing Zheng: >> Hi, >> We need to support rk3036 soc platform via upstream, there are >> some primary parts for the initial release of minimum system: dts, >> clk-pll, smp, and clock tree for rk3036, and additional, we can use >> these startup and run to init processs. > [...] > > after talking with Mike and agreeing that I'm again taking the regular > clock patches to them, I've applied all of this to appropriate branches. > I did some cosmetics, as explained below. > > >> Xing Zheng (6): >> dt-bindings: add documentation of rk3036 clock controller >> clk: rockchip: add dt-binding header for rk3036 >> clk: rockchip: add new pll-type for rk3036 and similar socs > - wrapped some overly long lines, otherwise this is similar to what > Stephen already took for the rk3066-pll-type. > > >> clk: rockchip: add clock controller for rk3036 >> ARM: dts: rockchip: add core rk3036 dts > - split off the evb into a separate patch > - reordered some nodes (please order by the address (the @xxxxxxxx) > - reordered some properties > - fixed the gic cpu masks > > >> ARM: dts: enable smp for rk3036 > folded into the core dtsi addition > > > Please take a final look at [0] to make sure I didn't mess up anything. > > > Thanks > Heiko > > > [0] > https://git.kernel.org/cgit/linux/kernel/git/mmind/linux-rockchip.git/log/?h=v4.5-clk/next > https://git.kernel.org/cgit/linux/kernel/git/mmind/linux-rockchip.git/log/?h=v4.5-armsoc/dts32 > > >