All of lore.kernel.org
 help / color / mirror / Atom feed
diff for duplicates of <56543A13.4040300@nvidia.com>

diff --git a/a/1.txt b/N1/1.txt
index 8a01210..21cd5c9 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -3,14 +3,14 @@ Hi Tyler,
 On 23/11/15 23:18, Tyler Baker wrote:
 > Hi Jon,
 > 
-> On 20 November 2015 at 07:11, Jon Hunter <jonathanh@nvidia.com> wrote:
+> On 20 November 2015 at 07:11, Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> wrote:
 >> The _clk_disable_pll() function will attempt to place a PLL into bypass
 >> if the TEGRA_PLL_BYPASS is specified for the PLL and then disable the PLL
 >> by clearing the enable bit. To place the PLL into bypass, the bypass bit
 >> needs to be set and not cleared. Fix this by setting the bypass bit and
 >> not clearing it.
 >>
->> Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
+>> Signed-off-by: Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
 > 
 > The kernelci.org bot recently detected a jetson-tk1 boot failure[1][2]
 > in the tegra tree. This boot failure has only been observed when
diff --git a/a/content_digest b/N1/content_digest
index 315392e..e6deaa6 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,21 +1,22 @@
  "ref\01448032264-29622-1-git-send-email-jonathanh@nvidia.com\0"
  "ref\0CANMBJr7vYb+kuUBzsC8i4b=b6DRVsbqnf5OrVtj6kVS2RMNgfQ@mail.gmail.com\0"
- "From\0Jon Hunter <jonathanh@nvidia.com>\0"
+ "ref\0CANMBJr7vYb+kuUBzsC8i4b=b6DRVsbqnf5OrVtj6kVS2RMNgfQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org\0"
+ "From\0Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0"
  "Subject\0Re: [PATCH] clk: tegra: Fix bypassing of PLLs\0"
  "Date\0Tue, 24 Nov 2015 10:21:07 +0000\0"
- "To\0Tyler Baker <tyler.baker@linaro.org>\0"
- "Cc\0Peter De Schrijver <pdeschrijver@nvidia.com>"
-  Prashant Gaikwad <pgaikwad@nvidia.com>
-  Michael Turquette <mturquette@baylibre.com>
-  Stephen Boyd <sboyd@codeaurora.org>
-  Stephen Warren <swarren@wwwdotorg.org>
-  Thierry Reding <thierry.reding@gmail.com>
-  Alexandre Courbot <gnurou@gmail.com>
-  <linux-clk@vger.kernel.org>
-  <linux-tegra@vger.kernel.org>
-  linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>
-  Rhyland Klein <rklein@nvidia.com>
- " Kevin's boot bot <khilman@kernel.org>\0"
+ "To\0Tyler Baker <tyler.baker-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>\0"
+ "Cc\0Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>"
+  Prashant Gaikwad <pgaikwad-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
+  Michael Turquette <mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
+  Stephen Boyd <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
+  Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
+  Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
+  Alexandre Courbot <gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
+  linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+  linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+  linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
+  Rhyland Klein <rklein-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
+ " Kevin's boot bot <khilman-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>\0"
  "\00:1\0"
  "b\0"
  "Hi Tyler,\n"
@@ -23,14 +24,14 @@
  "On 23/11/15 23:18, Tyler Baker wrote:\n"
  "> Hi Jon,\n"
  "> \n"
- "> On 20 November 2015 at 07:11, Jon Hunter <jonathanh@nvidia.com> wrote:\n"
+ "> On 20 November 2015 at 07:11, Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> wrote:\n"
  ">> The _clk_disable_pll() function will attempt to place a PLL into bypass\n"
  ">> if the TEGRA_PLL_BYPASS is specified for the PLL and then disable the PLL\n"
  ">> by clearing the enable bit. To place the PLL into bypass, the bypass bit\n"
  ">> needs to be set and not cleared. Fix this by setting the bypass bit and\n"
  ">> not clearing it.\n"
  ">>\n"
- ">> Signed-off-by: Jon Hunter <jonathanh@nvidia.com>\n"
+ ">> Signed-off-by: Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n"
  "> \n"
  "> The kernelci.org bot recently detected a jetson-tk1 boot failure[1][2]\n"
  "> in the tegra tree. This boot failure has only been observed when\n"
@@ -52,4 +53,4 @@
  "Cheers\n"
  Jon
 
-677df88ba1b750526b9b8c75009c3770b7e3101042453b6dde3309be7a917b89
+b0ae035a9238cb3cbbe9750bccb67a531a9ab6cbef8c3b687c04f7f3e459b643

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.