From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Cooper Subject: Re: [PATCH] x86/HVM: hide features dependent on XSAVE when booted with "no-xsave" Date: Fri, 27 Nov 2015 16:00:36 +0000 Message-ID: <56587E24.4050209@citrix.com> References: <5658478B02000078000B9A3E@prv-mh.provo.novell.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1a2LRx-0002vD-La for xen-devel@lists.xenproject.org; Fri, 27 Nov 2015 16:00:41 +0000 In-Reply-To: <5658478B02000078000B9A3E@prv-mh.provo.novell.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Jan Beulich , xen-devel Cc: Keir Fraser List-Id: xen-devel@lists.xenproject.org On 27/11/15 11:07, Jan Beulich wrote: > ... or when the guest has the XSAVE feature hidden by CPUID policy. > Not doing so is at best confusing to guests. > > Signed-off-by: Jan Beulich > --- > One question is whether we shouldn't switch leaf 7 to white listing, > just like done for PV guests. The general comments from my PV side review apply here as well. My levelling series has also moved all cpuid information to whitelist-based. It is the only safe way of doing things. I chose to defer AVX512 work from my levelling series, because it is rather more complicated than this, and there was insufficient details in the Extention reference. In particular, there is an suggestion that one of the feature bits indicates support for non-EVEX encoded instructions with k$N opmasks, which is not dependent on AVX512F. It is also odd to see it added to HVM guests but not PV. I would be tempted to leave all the AVX512 bits until the groundwork from my series is in. It is destined for Skylake-EP which is still a year off. ~Andrew