From: York Sun <yorksun@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v1] drivers/ddr/fsl: Enable detection of one DDR controller operation for LSCH3
Date: Mon, 30 Nov 2015 09:16:39 -0800 [thread overview]
Message-ID: <565C8477.1060800@freescale.com> (raw)
In-Reply-To: <1446659590-17219-1-git-send-email-yorksun@freescale.com>
On 11/04/2015 09:53 AM, York Sun wrote:
> Freescale LSCH3 platforms use two DDR controlers interleaving mode out of
> reset. It can be configured to disable one controller. To support this
> operation, the driver needs to detect and skip the disabled controller.
>
> Signed-off-by: York Sun <yorksun@freescale.com>
>
> ---
> Change log
> v1: Initial patch. Tested on LS2085AQDS and LS2085ARDB.
>
> arch/arm/include/asm/arch-fsl-layerscape/config.h | 7 ++++
> drivers/ddr/fsl/main.c | 1 +
> drivers/ddr/fsl/util.c | 40 +++++++++++++++++++++
> include/fsl_ddr.h | 1 +
> 4 files changed, 49 insertions(+)
Applied to fsl-qoriq master.
York
prev parent reply other threads:[~2015-11-30 17:16 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-04 17:53 [U-Boot] [PATCH v1] drivers/ddr/fsl: Enable detection of one DDR controller operation for LSCH3 York Sun
2015-11-30 17:16 ` York Sun [this message]
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