From: York Sun <yorksun@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v6 2/2] armv8: fsl-layerscape: Make DDR non secure in MMU tables
Date: Wed, 2 Dec 2015 19:04:56 -0800 [thread overview]
Message-ID: <565FB158.4030305@freescale.com> (raw)
In-Reply-To: <DM2PR0301MB07845FED1B454B697CE1C1FA8B0D0@DM2PR0301MB0784.namprd03.prod.outlook.com>
On 12/02/2015 06:48 PM, Hou Zhiqiang-B48286 wrote:
>
>
>> -----Original Message-----
>> From: York Sun [mailto:yorksun at freescale.com]
>> Sent: 2015?12?3? 0:00
>> To: Hou Zhiqiang-B48286; U-Boot Mailing List
>> Cc: Pan Lijun-B44306; Hu Mingkai-B21284; Sharma Bhupesh-B45370; Gong
>> Qianyu-B52263; Tom Rini; Li Yang-Leo-R58472; Albert Aribaud; Kushwaha
>> Prabhakar-B32579; Wang Huan-B18965
>> Subject: Re: [PATCH v6 2/2] armv8: fsl-layerscape: Make DDR non secure in
>> MMU tables
>>
>>
>>
>> On 12/01/2015 10:38 PM, Hou Zhiqiang-B48286 wrote:
>>
>> <snip>
>>
>>>> /* Invalidate all table entries */
>>>> memset(level0_table, 0, PGTABLE_SIZE); @@ -269,6 +344,22 @@ static
>>>> inline void final_mmu_setup(void)
>>>> &final_mmu_table[i]);
>>>> }
>>>> }
>>>> + /* Set the secure memory to secure in MMU */ #ifdef
>>>> +CONFIG_SYS_MEM_RESERVE_SECURE
>>>> + if (gd->secure_ram & MEM_RESERVE_SECURE_MAINTAINED) { #ifdef
>>>> +CONFIG_FSL_LSCH3
>>>> + level2_table_secure = level2_table1 + 512; #elif
>>>> +defined(CONFIG_FSL_LSCH2)
>>>> + level2_table_secure = level2_table2 + 512; #endif
>>>> + /* update tlb pointer */
>>>> + gd->arch.tlb_addr = gd->secure_ram & ~0x3;
>>>
>>> The memory reserved for mmu table was lost? If it's better to record it
>> and use for non-sec mmu table?
>>
>> That can be arranged.
>>
>>>
>>> If this func is called from non-secure state, for example EL2, the
>> secure memory cannot be accessed and the PMD_SECT_NS bit should be
>> cleared.
>>
>> We need to setup secure memory at EL3 to have secure memory to begin with.
>> But you have a point here. Will look into it.
>>
>
> Yes, this func is called at EL3 for now, it is a assumption for this func.
> I mean we'd better make it a API that can be invoked at both EL3 and EL2
> to setup the MMU table. And do you know if the EL1 should be taken into
> account in u-boot?
We don't need to differentiate this function for EL2 or EL1 if we ever need to
run at. The only difference is EL3 can handle secure access. So adding a
detection of exception level before setting secure bit will suffice.
York
next prev parent reply other threads:[~2015-12-03 3:04 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-18 18:01 [U-Boot] [PATCH v6 0/2] Make most DDR non-secure in MMU while keep a small block secure York Sun
2015-11-18 18:01 ` [U-Boot] [PATCH v6 1/2] Reserve secure memory York Sun
2015-11-18 18:01 ` [U-Boot] [PATCH v6 2/2] armv8: fsl-layerscape: Make DDR non secure in MMU tables York Sun
2015-12-02 6:38 ` Hou Zhiqiang
2015-12-02 16:00 ` York Sun
2015-12-03 2:48 ` Hou Zhiqiang
2015-12-03 3:04 ` York Sun [this message]
2015-12-03 6:41 ` Hou Zhiqiang
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