From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753018AbbLCTBp (ORCPT ); Thu, 3 Dec 2015 14:01:45 -0500 Received: from mail-lf0-f46.google.com ([209.85.215.46]:33059 "EHLO mail-lf0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751825AbbLCTBo (ORCPT ); Thu, 3 Dec 2015 14:01:44 -0500 Subject: Re: [PATCHv2 2/2] usb: pci-quirks: register USB mux found on Cherrytrail SOC To: Heikki Krogerus , Chanwoo Choi , Greg Kroah-Hartman References: <1449134991-39095-1-git-send-email-heikki.krogerus@linux.intel.com> <1449134991-39095-3-git-send-email-heikki.krogerus@linux.intel.com> Cc: MyungJoo Ham , David Cohen , Lu Baolu , Mathias Nyman , Felipe Balbi , linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org From: Sergei Shtylyov Organization: Cogent Embedded Message-ID: <56609193.4090801@cogentembedded.com> Date: Thu, 3 Dec 2015 22:01:39 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.3.0 MIME-Version: 1.0 In-Reply-To: <1449134991-39095-3-git-send-email-heikki.krogerus@linux.intel.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello. On 12/03/2015 12:29 PM, Heikki Krogerus wrote: > Intel Braswell/Cherrytrail has an internal mux that shares > one USB port between USB Device Controller and xHCI. The > same mux is found on several SOCs from Intel, but only on > a few Cherrytrail based platforms the OS is expected to > configure it. Normally BIOS takes care of it. > > The driver for the mux is an "extcon" driver. With this we > only register the mux if it's detected. Hm, I had somewhat identical case on the Renesas SoC: the 2 channel mux was mapped to the USB device PHY register space, so I chose to implement a PHY driver, not extcon... I don't quite understand how mux maps to the extcon core -- doesn't it provide support only the input signals? > Suggested-by: Lu Baolu > Signed-off-by: Heikki Krogerus > --- > drivers/usb/host/pci-quirks.c | 26 +++++++++++++++++++++++++- > 1 file changed, 25 insertions(+), 1 deletion(-) > > diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c > index 26cb8c8..ee875e1 100644 > --- a/drivers/usb/host/pci-quirks.c > +++ b/drivers/usb/host/pci-quirks.c [...] > @@ -1022,9 +1023,32 @@ static void quirk_usb_handoff_xhci(struct pci_dev *pdev) > writel(val, base + ext_cap_offset + XHCI_LEGACY_CONTROL_OFFSET); > > hc_init: > - if (pdev->vendor == PCI_VENDOR_ID_INTEL) > + if (pdev->vendor == PCI_VENDOR_ID_INTEL) { > usb_enable_intel_xhci_ports(pdev); > > + /* > + * Initialize the internal mux that shares a port between USB > + * Device Controller and xHCI on platforms that have it. > + */ > +#define XHCI_INTEL_VENDOR_CAPS 192 > +#define XHCI_INTEL_USB_MUX_OFFSET 0x80d8 > + if (xhci_find_next_ext_cap(base, 0, XHCI_INTEL_VENDOR_CAPS)) { > + struct intel_usb_mux *mux; > + struct resource r; > + > + r.start = pci_resource_start(pdev, 0) + > + XHCI_INTEL_USB_MUX_OFFSET; > + r.end = r.start + 8; > + r.flags = IORESOURCE_MEM; > + > + mux = intel_usb_mux_register(&pdev->dev, &r); > + if (IS_ERR(mux) && PTR_ERR(mux) == -ENOTSUPP) I think you can drop IS_ERR() check here... > + dev_dbg(&pdev->dev, "USB mux not supported\n"); > + else if (IS_ERR(mux)) > + dev_err(&pdev->dev, "failed to register mux\n"); > + } > + } > + > op_reg_base = base + XHCI_HC_LENGTH(readl(base)); > > /* Wait for the host controller to be ready before writing any MBR, Sergei