Hi Bjorn,

reading up on the mailing list this is probably not the first time this 
topic comes up, but this time it is not just for FPGAs but for really 
end user hardware.

Alex and I are the maintainers of the Radeon and Amdgpu kernel drivers 
for the AMD graphics hardware.  Now the newest hardware generation of 
those devices started to support resizeable PCI BARs as specified here 
https://pcisig.com/sites/default/files/specification_documents/ECN_Resizable-BAR_24Apr2008.pdf.

That feature is rather important for graphics hardware, because the PCI 
BARs are usually limited to 256MB while on modern cards you can easily 
find 4GB or more VRAM. The end result is that only a fraction of that 
VRAM is CPU accessible, causing a whole bunch of workarounds in the 
driver stack for that hardware.

We of course want to avoid that hassle and so I've attached two patches 
created to test the functionality. The first one is just infrastructure 
for handling the extension and the second is a hack to resize all BARs 
to their maximum before probing them by the PCI subsystem.

That resizing works astonishing fine, the only problem is that on 
practical no system I've tested this feature actually works. The reason 
is that the PCI root bridge doesn't get enough address space assigned by 
the BIOS for this and the PCI subsystem in the kernel isn't able to 
reprogram it.

Any clever idea how to get this working without waiting for system BIOS 
providers to pick up that extension? Would adding support for 
reprogramming the root bridges be possible?

Best regards,
Christian.