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From: Eric Nelson <eric@nelint.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 1/2] net: fec_mxc: configure MDIO hold time
Date: Tue, 8 Dec 2015 09:08:01 -0700	[thread overview]
Message-ID: <56670061.8060505@nelint.com> (raw)
In-Reply-To: <1449589126-10530-1-git-send-email-mans@mansr.com>

Hi Mans,

On 12/08/2015 08:38 AM, Mans Rullgard wrote:
> If the host clock frequency is higher than 100 MHz, the MDIO hold
> time needs to be increased from its current setting of one cycle in
> order to meet the specified minium of 10 ns.  Writing an appropriate
> value to the HOLDTIME field of the MII_SPEED register achieves this.
> 
> Comment copied from Linux kernel.
> 
> Signed-off-by: Mans Rullgard <mans@mansr.com>
> ---
>  drivers/net/fec_mxc.c | 18 +++++++++++++++---
>  1 file changed, 15 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
> index 79f6737..1250d2a 100644
> --- a/drivers/net/fec_mxc.c
> +++ b/drivers/net/fec_mxc.c
> @@ -131,13 +131,25 @@ static void fec_mii_setspeed(struct ethernet_regs *eth)
>  	/*
>  	 * Set MII_SPEED = (1/(mii_speed * 2)) * System Clock
>  	 * and do not drop the Preamble.
> +	 *

s/filed/field/

> +	 * The i.MX28 and i.MX6 types have another filed in the MSCR (aka
> +	 * MII_SPEED) register that defines the MDIO output hold time. Earlier
> +	 * versions are RAZ there, so just ignore the difference and write the
> +	 * register always.
> +	 * The minimal hold time according to IEE802.3 (clause 22) is 10 ns.
> +	 * HOLDTIME + 1 is the number of clk cycles the fec is holding the
> +	 * output.
> +	 * The HOLDTIME bitfield takes values between 0 and 7 (inclusive).
> +	 * Given that ceil(clkrate / 5000000) <= 64, the calculation for
> +	 * holdtime cannot result in a value greater than 3.
>  	 */
> -	register u32 speed = DIV_ROUND_UP(imx_get_fecclk(), 5000000);
> +	u32 pclk = imx_get_fecclk();
> +	u32 speed = DIV_ROUND_UP(pclk, 5000000);
> +	u32 hold = DIV_ROUND_UP(pclk, 100000000) - 1;
>  #ifdef FEC_QUIRK_ENET_MAC
>  	speed--;
>  #endif
> -	speed <<= 1;
> -	writel(speed, &eth->mii_speed);
> +	writel(speed << 1 | hold << 8, &eth->mii_speed);
>  	debug("%s: mii_speed %08x\n", __func__, readl(&eth->mii_speed));
>  }
>  
> 
Otherwise,

Reviewed-by: Eric Nelson <eric@nelint.com>

  parent reply	other threads:[~2015-12-08 16:08 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-12-08 15:38 [U-Boot] [PATCH 1/2] net: fec_mxc: configure MDIO hold time Mans Rullgard
2015-12-08 15:38 ` [U-Boot] [PATCH 2/2] net: fec_mxc: unregister mdio bus on probe error Mans Rullgard
2015-12-08 16:17   ` Eric Nelson
2015-12-08 16:21     ` Måns Rullgård
2016-01-03 14:28   ` Stefano Babic
2015-12-08 16:08 ` Eric Nelson [this message]
2016-01-03 14:27   ` [U-Boot] [PATCH 1/2] net: fec_mxc: configure MDIO hold time Stefano Babic

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