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From: Harvey Hunt <harvey.hunt@imgtec.com>
To: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: <linux-mtd@lists.infradead.org>,
	Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>,
	<linux-kernel@vger.kernel.org>,
	Alex Smith <alex.smith@imgtec.com>,
	Brian Norris <computersforpeace@gmail.com>,
	"David Woodhouse" <dwmw2@infradead.org>
Subject: Re: [PATCH v9 2/3] mtd: nand: jz4780: driver for NAND devices on JZ4780 SoCs
Date: Tue, 8 Dec 2015 16:36:12 +0000	[thread overview]
Message-ID: <566706FC.9020606@imgtec.com> (raw)
In-Reply-To: <20151208172641.4e1f935a@bbrezillon>



On 08/12/15 16:26, Boris Brezillon wrote:
> On Tue, 8 Dec 2015 16:03:55 +0000
> Harvey Hunt <harvey.hunt@imgtec.com> wrote:
>
>>>
>>> static void jz4780_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
>>> 				 unsigned int ctrl)
>>> {
>>> 	struct jz4780_nand_chip *nand = to_jz4780_nand_chip(mtd);
>>> 	struct jz4780_nand_controller *nfc = to_jz4780_nand_controller(nand->chip.controller);
>>> 	struct jz4780_nand_cs *cs;
>>>
>>> 	if (WARN_ON(nfc->selected < 0))
>>> 		return;
>>>
>>> 	cs = &nfc->cs[nfc->selected];
>>>
>>> 	if (ctrl & NAND_CTRL_CHANGE) {
>>> 		if (cmd != NAND_CMD_NONE) {
>>> 			if (ctrl & NAND_ALE)
>>> 				writeb(cmd, cs->base + OFFSET_ADDR);
>>> 			else if (ctrl & NAND_CLE)
>>> 				writeb(cmd, cs->base + OFFSET_CMD);
>>> 		}
>>>
>>> 		jz4780_nemc_assert(nfc->dev, cs->bank, ctrl & NAND_NCE);
>>> 	}
>>> }
>>>
>>
>> Okay, I understand your point now. I would also have to implement the
>> read/write functions to replace the defaults, correct? If so, it feels
>> strange to add functions to reimplement the default ones.
>>
>
> Actually it should be something like this, because NAND_CTRL_CHANGE is
> cleared after the first address cycle.
>
> static void jz4780_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
>   				 unsigned int ctrl)
> {
> 	struct jz4780_nand_chip *nand = to_jz4780_nand_chip(mtd);
> 	struct jz4780_nand_controller *nfc = to_jz4780_nand_controller(nand->chip.controller);
> 	struct jz4780_nand_cs *cs;
>
> 	if (WARN_ON(nfc->selected < 0))
> 		return;
>
> 	cs = &nfc->cs[nfc->selected];
>
> 	jz4780_nemc_assert(nfc->dev, cs->bank, ctrl & NAND_NCE);
>
>   	if (cmd == NAND_CMD_NONE)
> 		return;
>
> 	if (ctrl & NAND_ALE)
> 		writeb(cmd, cs->base + OFFSET_ADDR);
>   	else if (ctrl & NAND_CLE)
>   		writeb(cmd, cs->base + OFFSET_CMD);
> }
>

Thanks for the example code, I'll try it out for the next version.

  reply	other threads:[~2015-12-08 16:36 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-12-03 12:02 [PATCH v9 0/3] mtd: nand: jz4780: Add NAND and BCH drivers Harvey Hunt
2015-12-03 12:02 ` Harvey Hunt
2015-12-03 12:02 ` [PATCH v9 1/3] dt-bindings: binding for jz4780-{nand,bch} Harvey Hunt
2015-12-03 12:02   ` Harvey Hunt
2015-12-03 21:38   ` Rob Herring
2015-12-03 22:38     ` Brian Norris
2015-12-03 22:38       ` Brian Norris
2015-12-08 14:17   ` Boris Brezillon
2015-12-08 14:17     ` Boris Brezillon
2015-12-03 12:02 ` [PATCH v9 2/3] mtd: nand: jz4780: driver for NAND devices on JZ4780 SoCs Harvey Hunt
2015-12-08 14:14   ` Boris Brezillon
2015-12-08 16:03     ` Harvey Hunt
2015-12-08 16:12       ` Boris Brezillon
2015-12-08 16:13         ` Harvey Hunt
2015-12-08 16:26       ` Boris Brezillon
2015-12-08 16:36         ` Harvey Hunt [this message]
2015-12-14 16:25   ` Boris Brezillon
2015-12-16 11:00     ` Harvey Hunt
2015-12-03 12:02 ` [PATCH v9 3/3] MIPS: dts: jz4780/ci20: Add NEMC, BCH and NAND device tree nodes Harvey Hunt
2015-12-03 12:02   ` Harvey Hunt
2015-12-08 14:20   ` Boris Brezillon
2015-12-08 14:20     ` Boris Brezillon

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