Re: [Qemu-devel] [PATCH v3 4/4] target-tilegx: Integrate floating pointer implementation

[Chen Gang <chengang@emindsoft.com.cn>]

On 12/11/15 05:37, Richard Henderson wrote:
> On 12/10/2015 06:16 AM, Chen Gang wrote:

[...]

>>
>> diff --git a/target-tilegx/cpu.h b/target-tilegx/cpu.h
>> index 03df107..445a606 100644
>> --- a/target-tilegx/cpu.h
>> +++ b/target-tilegx/cpu.h
>> @@ -88,6 +88,8 @@ typedef struct CPUTLGState {
>>      uint64_t spregs[TILEGX_SPR_COUNT]; /* Special used registers by outside */
>>      uint64_t pc;                       /* Current pc */
>>  
>> +    float_status fp_status;            /* floating point status */
> 
> As mentioned elsewhere, this is pointless.
>

OK, thanks.
 
>> +    case OE_RR_X0(FSINGLE_PACK1):
>> +    case OE_RR_Y0(FSINGLE_PACK1):
>> +        mnemonic = "fsingle_pack1";
>> +        goto done2;
> 
> This could use a comment that we're "copying" dest to dest.
> 

OK, thanks.

>> @@ -742,13 +745,21 @@ static TileExcp gen_rr_opcode(DisasContext *dc, unsigned opext,
>>  static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext,
>>                                 unsigned dest, unsigned srca, unsigned srcb)
>>  {
>> -    TCGv tdest = dest_gr(dc, dest);
>> -    TCGv tsrca = load_gr(dc, srca);
>> -    TCGv tsrcb = load_gr(dc, srcb);
>> +    TCGv tdest, tsrca, tsrcb;
>>      TCGv t0;
>>      const char *mnemonic;
>>  
>>      switch (opext) {
>> +    case OE_RRR(FSINGLE_ADDSUB2, 0, X0):
>> +        mnemonic = "fsingle_addsub2";
>> +        goto done2;
>> +    }
> 
> Likewise.
> 

Thanks.
-- 
Chen Gang (陈刚)

Open, share, and attitude like air, water, and life which God blessed