From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47478) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1a8bK6-0000Dy-7i for qemu-devel@nongnu.org; Mon, 14 Dec 2015 17:10:27 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1a8bK2-0007Od-W0 for qemu-devel@nongnu.org; Mon, 14 Dec 2015 17:10:26 -0500 Received: from smtp.fgznet.ch ([157.161.14.54]:49738) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1a8bK2-0007HD-Pj for qemu-devel@nongnu.org; Mon, 14 Dec 2015 17:10:22 -0500 References: <1450082498-27109-1-git-send-email-a.rigo@virtualopensystems.com> From: Andreas Tobler Message-ID: <566F3E35.7040308@fgznet.ch> Date: Mon, 14 Dec 2015 23:09:57 +0100 MIME-Version: 1.0 In-Reply-To: <1450082498-27109-1-git-send-email-a.rigo@virtualopensystems.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [RFC v6 00/14] Slow-path for atomic instruction translation List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alvise Rigo , qemu-devel@nongnu.org, mttcg@listserver.greensocs.com Cc: claudio.fontana@huawei.com, pbonzini@redhat.com, jani.kokkonen@huawei.com, tech@virtualopensystems.com, alex.bennee@linaro.org, rth@twiddle.net Alvise, On 14.12.15 09:41, Alvise Rigo wrote: > This is the sixth iteration of the patch series which applies to the > upstream branch of QEMU (v2.5.0-rc3). > > Changes versus previous versions are at the bottom of this cover letter. > > The code is also available at following repository: > https://git.virtualopensystems.com/dev/qemu-mt.git > branch: > slowpath-for-atomic-v6-no-mttcg Thank you very much for this work. I tried to rebase myself, but it was over my head. I'm looking for a qemu solution where I can use my cores. My use case is doing gcc porting for aarch64-*-freebsd*. I think it doesn't matter which OS. This arch has not enough real affordable HW solutions on the market yet. So I was looking for your solution. Claudio gave me a hint about it. Your recent merge/rebase only covers arm itself, not aarch64, right? Linking fails with unreferenced cpu_exclusive_addr stuff in target-arm/translate-a64.c Are you working on this already? Or Claudio? > This work has been sponsored by Huawei Technologies Duesseldorf GmbH. ... Thank you! Andreas