From: Paolo Bonzini <pbonzini@redhat.com>
To: "Gonglei (Arei)" <arei.gonglei@huawei.com>,
Radim Krcmar <rkrcmar@redhat.com>
Cc: "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
"kevin@koconnor.net" <kevin@koconnor.net>,
"Huangpeng (Peter)" <peter.huangpeng@huawei.com>,
"ehabkost@redhat.com" <ehabkost@redhat.com>,
"rth@twiddle.net" <rth@twiddle.net>
Subject: Re: [Qemu-devel] [PATCH] rtc: introduce nmi disable bit handler for cmos
Date: Wed, 16 Dec 2015 13:14:34 +0100 [thread overview]
Message-ID: <567155AA.9040906@redhat.com> (raw)
In-Reply-To: <33183CC9F5247A488A2544077AF19020B02B5191@SZXEMA503-MBS.china.huawei.com>
On 16/12/2015 11:28, Gonglei (Arei) wrote:
> I'll move the global nmi_disabled into RTCState, then I have to add a global RTCState
> Variable so that other C files can use the rtc_state->external_nmi_disabled.
Hmm, I think it should be done differently. This is a layering
violation, the NMI_EN is essentially a pin (qemu_irq) between the ISA
bridges and the RTC. The NMI "button" is also a component of the ISA
bridge; you should not need to touch anything except the RTC and the ISA
bridges, in particular not the APICs.
First, you need to add a qemu_irq argument to rtc_init. The RTC can
raise/lower the IRQ on writes to port 0x70.
Second, make the ISA bridges implement NMIState, where the
implementation of NMIState is similar to inject_nmi in hw/core/nmi.c:
CPU_FOREACH(cs) {
X86CPU *cpu = X86_CPU(cs);
if (!cpu->apic_state) {
cpu_interrupt(cs, CPU_INTERRUPT_NMI);
} else {
apic_deliver_nmi(cpu->apic_state);
}
}
Third, the ISA bridges (hw/isa/piix4.c and hw/isa/lpc_ich9.c) need to
export a qemu_irq for nmi_en IRQ (e.g. using qdev_init_gpio_in_named),
and you should modify the ISA bridge's implementation of NMIState to
latch the NMI if you send one while NMIs are disabled. The nmi_en IRQ
can also trigger an NMI when nmi_en is enabled and an NMI was latched.
The nmi_en status and NMI latch status must be migrated in a new
subsection of the ISA bridges.
Fourth, the PC machines should use qdev_get_gpio_in_named to retrieve
the qemu_irq from the ISA bridges, and pass it to pc_basic_device_init.
I may have messed up some steps, but this is the basic idea.
Paolo
next prev parent reply other threads:[~2015-12-16 12:14 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-12 13:15 [Qemu-devel] [PATCH] rtc: introduce nmi disable bit handler for cmos Gonglei
2015-12-14 9:56 ` Paolo Bonzini
2015-12-14 12:49 ` Gonglei (Arei)
2015-12-14 12:51 ` Paolo Bonzini
2015-12-14 13:27 ` Gonglei (Arei)
2015-12-14 13:37 ` Paolo Bonzini
2015-12-15 0:58 ` Gonglei (Arei)
2015-12-15 9:34 ` Gonglei (Arei)
2015-12-15 10:43 ` Paolo Bonzini
2015-12-15 18:53 ` Radim Krcmar
2015-12-16 8:26 ` Gonglei (Arei)
2015-12-16 8:51 ` Paolo Bonzini
2015-12-16 10:28 ` Gonglei (Arei)
2015-12-16 12:14 ` Paolo Bonzini [this message]
2015-12-17 7:17 ` Gonglei (Arei)
2015-12-17 8:37 ` Paolo Bonzini
2015-12-17 9:04 ` Gonglei (Arei)
2015-12-14 18:16 ` Eduardo Habkost
2015-12-15 1:00 ` Gonglei (Arei)
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=567155AA.9040906@redhat.com \
--to=pbonzini@redhat.com \
--cc=arei.gonglei@huawei.com \
--cc=ehabkost@redhat.com \
--cc=kevin@koconnor.net \
--cc=peter.huangpeng@huawei.com \
--cc=qemu-devel@nongnu.org \
--cc=rkrcmar@redhat.com \
--cc=rth@twiddle.net \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.