From mboxrd@z Thu Jan 1 00:00:00 1970 From: Boris Ostrovsky Subject: Re: [PATCH v2] x86/vPMU: constrain MSR_IA32_DS_AREA loads Date: Fri, 18 Dec 2015 11:59:36 -0500 Message-ID: <56743B78.70004@oracle.com> References: <567447BF02000078000C167E@prv-mh.provo.novell.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: Received: from mail6.bemta4.messagelabs.com ([85.158.143.247]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1a9yNU-0000Dz-Dk for xen-devel@lists.xenproject.org; Fri, 18 Dec 2015 16:59:36 +0000 In-Reply-To: <567447BF02000078000C167E@prv-mh.provo.novell.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Jan Beulich , xen-devel Cc: Andrew Cooper , Kevin Tian , Keir Fraser , Jun Nakajima List-Id: xen-devel@lists.xenproject.org On 12/18/2015 11:51 AM, Jan Beulich wrote: > For one, loading the MSR with a possibly non-canonical address was > possible since the verification is conditional, while the MSR load > wasn't. And then for PV guests we need to further limit the range of > valid addresses to exclude the hypervisor range. > > Signed-off-by: Jan Beulich > --- > v2: Also alter the MSR write check, in anticipation of it becoming > accessible by PV guests eventually. Reviewed-by: Boris Ostrovsky