All of lore.kernel.org
 help / color / mirror / Atom feed
diff for duplicates of <568BB603.4030904@arm.com>

diff --git a/a/1.txt b/N1/1.txt
index 4d06d2c..b6c1c92 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -3,7 +3,7 @@ Hi Julian,
 On 04/01/16 22:04, Julian Calaby wrote:
 > Hi Andre,
 > 
-> On Mon, Jan 4, 2016 at 10:02 PM, Andre Przywara <andre.przywara-5wv7dgnIgG8@public.gmane.org> wrote:
+> On Mon, Jan 4, 2016 at 10:02 PM, Andre Przywara <andre.przywara@arm.com> wrote:
 >> Hi,
 >>
 >> while looking at the Allwinner A64 SoC support, I was wondering why we
@@ -21,7 +21,7 @@ On 04/01/16 22:04, Julian Calaby wrote:
 >> existing "allwinner,function" in the SoC's .dtsi would give us all the
 >> information we need. This could look like:
 >>
->>         uart0_pins_a: uart0@0 {
+>>         uart0_pins_a: uart0 at 0 {
 >>                 allwinner,pins =   "PB22", "PB23";
 >> +               allwinner,muxval = <0x02    0x02>;
 >>                 allwinner,function = "uart0";
diff --git a/a/content_digest b/N1/content_digest
index 439aced..7c46f0d 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,16 +1,9 @@
  "ref\0568A514D.7070102@arm.com\0"
  "ref\0CAGRGNgUVNGoOUNqyySjYzkL4KfEWK8orYH-AMxoCX-9N0R80-A@mail.gmail.com\0"
- "ref\0CAGRGNgUVNGoOUNqyySjYzkL4KfEWK8orYH-AMxoCX-9N0R80-A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org\0"
- "From\0Andre Przywara <andre.przywara-5wv7dgnIgG8@public.gmane.org>\0"
- "Subject\0Re: reason for Allwinner SoC specific pinctrl drivers?\0"
+ "From\0andre.przywara@arm.com (Andre Przywara)\0"
+ "Subject\0[linux-sunxi] reason for Allwinner SoC specific pinctrl drivers?\0"
  "Date\0Tue, 5 Jan 2016 12:24:35 +0000\0"
- "To\0Julian Calaby <julian.calaby-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0"
- "Cc\0Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>"
-  Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
-  linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-  linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org <linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org>
-  linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
- " Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "Hi Julian,\n"
@@ -18,7 +11,7 @@
  "On 04/01/16 22:04, Julian Calaby wrote:\n"
  "> Hi Andre,\n"
  "> \n"
- "> On Mon, Jan 4, 2016 at 10:02 PM, Andre Przywara <andre.przywara-5wv7dgnIgG8@public.gmane.org> wrote:\n"
+ "> On Mon, Jan 4, 2016 at 10:02 PM, Andre Przywara <andre.przywara@arm.com> wrote:\n"
  ">> Hi,\n"
  ">>\n"
  ">> while looking at the Allwinner A64 SoC support, I was wondering why we\n"
@@ -36,7 +29,7 @@
  ">> existing \"allwinner,function\" in the SoC's .dtsi would give us all the\n"
  ">> information we need. This could look like:\n"
  ">>\n"
- ">>         uart0_pins_a: uart0@0 {\n"
+ ">>         uart0_pins_a: uart0 at 0 {\n"
  ">>                 allwinner,pins =   \"PB22\", \"PB23\";\n"
  ">> +               allwinner,muxval = <0x02    0x02>;\n"
  ">>                 allwinner,function = \"uart0\";\n"
@@ -82,4 +75,4 @@
  "Cheers,\n"
  Andre.
 
-27d01ecef4e14182b159eb2a5ce43505a86624ea974e8b3bcb912e7336babad1
+1eaffc4b14950eb332c4d9402ea187c5e6eb75280684e46e9d526ef7f6522543

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.