From mboxrd@z Thu Jan 1 00:00:00 1970 From: Yakir Yang Subject: Re: [PATCH v2 2/3] drm/rockchip: vop: add rk3229 vop support Date: Wed, 6 Jan 2016 14:13:26 +0800 Message-ID: <568CB086.3000609@rock-chips.com> References: <1451965688-12286-1-git-send-email-ykk@rock-chips.com> <1451966307-12642-1-git-send-email-ykk@rock-chips.com> <568C6650.5040708@rock-chips.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; Format="flowed" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <568C6650.5040708@rock-chips.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Mark yao , Heiko Stuebner , David Airlie Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org List-Id: linux-rockchip.vger.kernel.org SGkgTWFyaywKCk9uIDAxLzA2LzIwMTYgMDg6NTYgQU0sIE1hcmsgeWFvIHdyb3RlOgo+IE9uIDIw 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01:13:41 -0500 X-263anti-spam: KSV:0; X-MAIL-GRAY: 1 X-MAIL-DELIVERY: 0 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 X-RL-SENDER: ykk@rock-chips.com X-FST-TO: linux-rockchip@lists.infradead.org X-SENDER-IP: 103.29.142.67 X-LOGIN-NAME: ykk@rock-chips.com X-UNIQUE-TAG: X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Subject: Re: [PATCH v2 2/3] drm/rockchip: vop: add rk3229 vop support To: Mark yao , Heiko Stuebner , David Airlie References: <1451965688-12286-1-git-send-email-ykk@rock-chips.com> <1451966307-12642-1-git-send-email-ykk@rock-chips.com> <568C6650.5040708@rock-chips.com> Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org From: Yakir Yang Message-ID: <568CB086.3000609@rock-chips.com> Date: Wed, 6 Jan 2016 14:13:26 +0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.3.0 MIME-Version: 1.0 In-Reply-To: <568C6650.5040708@rock-chips.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Mark, On 01/06/2016 08:56 AM, Mark yao wrote: > On 2016年01月05日 11:58, Yakir Yang wrote: >> RK3229 registers layout is simalar to RK3288 layout, only the >> interruput registers is different to RK3288. >> >> RK3229 support two overlay plane and one hwc plane, max output >> resolution is 4K. it support IOMMU, and its IOMMU same as rk3288's. >> >> Signed-off-by: Yakir Yang >> --- >> Changes in v2: >> - Separate the write-mask changes out, and remove the DUMMY_INTR >> marcos (Heiko) >> >> drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 110 >> ++++++++++++++++++++++++++++ >> drivers/gpu/drm/rockchip/rockchip_vop_reg.h | 90 >> +++++++++++++++++++++++ >> 2 files changed, 200 insertions(+) >> >> diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c >> b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c >> index 7fbaf76..f1358f9 100644 >> --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c >> +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c >> @@ -191,6 +191,114 @@ static const struct vop_data rk3288_vop = { >> .win_size = ARRAY_SIZE(rk3288_vop_win_data), >> }; >> +static const struct vop_scl_extension rk3229_win_full_scl_ext = { >> + .cbcr_vsd_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 31), >> + .cbcr_vsu_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 30), >> + .cbcr_hsd_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 28), >> + .cbcr_ver_scl_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 26), >> + .cbcr_hor_scl_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 24), >> + .yrgb_vsd_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 23), >> + .yrgb_vsu_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 22), >> + .yrgb_hsd_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 20), >> + .yrgb_ver_scl_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 18), >> + .yrgb_hor_scl_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 16), >> + .line_load_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 15), >> + .cbcr_axi_gather_num = VOP_REG(RK3229_WIN0_CTRL1, 0x7, 12), >> + .yrgb_axi_gather_num = VOP_REG(RK3229_WIN0_CTRL1, 0xf, 8), >> + .vsd_cbcr_gt2 = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 7), >> + .vsd_cbcr_gt4 = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 6), >> + .vsd_yrgb_gt2 = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 5), >> + .vsd_yrgb_gt4 = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 4), >> + .bic_coe_sel = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 2), >> + .cbcr_axi_gather_en = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 1), >> + .yrgb_axi_gather_en = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 0), >> + .lb_mode = VOP_REG(RK3229_WIN0_CTRL0, 0x7, 5), >> +}; >> + >> +static const struct vop_scl_regs rk3229_win_full_scl = { >> + .ext = &rk3229_win_full_scl_ext, >> + .scale_yrgb_x = VOP_REG(RK3229_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0), >> + .scale_yrgb_y = VOP_REG(RK3229_WIN0_SCL_FACTOR_YRGB, 0xffff, 16), >> + .scale_cbcr_x = VOP_REG(RK3229_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0), >> + .scale_cbcr_y = VOP_REG(RK3229_WIN0_SCL_FACTOR_CBR, 0xffff, 16), >> +}; >> + >> +static const struct vop_win_phy rk3229_win01_data = { >> + .scl = &rk3229_win_full_scl, >> + .data_formats = formats_win_full, >> + .nformats = ARRAY_SIZE(formats_win_full), >> + .enable = VOP_REG(RK3229_WIN0_CTRL0, 0x1, 0), >> + .format = VOP_REG(RK3229_WIN0_CTRL0, 0x7, 1), >> + .rb_swap = VOP_REG(RK3229_WIN0_CTRL0, 0x1, 12), >> + .act_info = VOP_REG(RK3229_WIN0_ACT_INFO, 0x1fff1fff, 0), >> + .dsp_info = VOP_REG(RK3229_WIN0_DSP_INFO, 0x0fff0fff, 0), >> + .dsp_st = VOP_REG(RK3229_WIN0_DSP_ST, 0x1fff1fff, 0), >> + .yrgb_mst = VOP_REG(RK3229_WIN0_YRGB_MST, 0xffffffff, 0), >> + .uv_mst = VOP_REG(RK3229_WIN0_CBR_MST, 0xffffffff, 0), >> + .yrgb_vir = VOP_REG(RK3229_WIN0_VIR, 0x3fff, 0), >> + .uv_vir = VOP_REG(RK3229_WIN0_VIR, 0x3fff, 16), >> + .src_alpha_ctl = VOP_REG(RK3229_WIN0_SRC_ALPHA_CTRL, 0xff, 0), >> + .dst_alpha_ctl = VOP_REG(RK3229_WIN0_DST_ALPHA_CTRL, 0xff, 0), >> +}; >> + >> +static const struct vop_win_data rk3229_vop_win_data[] = { >> + { .base = 0x00, .phy = &rk3229_win01_data, >> + .type = DRM_PLANE_TYPE_PRIMARY }, >> + { .base = 0x40, .phy = &rk3229_win01_data, >> + .type = DRM_PLANE_TYPE_CURSOR }, >> +}; >> + >> +static const struct vop_ctrl rk3229_ctrl_data = { >> + .cfg_done = VOP_REG(RK3229_REG_CFG_DONE, 0x1, 0), >> + .standby = VOP_REG(RK3229_SYS_CTRL, 0x1, 22), >> + .gate_en = VOP_REG(RK3229_SYS_CTRL, 0x1, 23), >> + .mmu_en = VOP_REG(RK3229_SYS_CTRL, 0x1, 20), >> + .rgb_en = VOP_REG(RK3229_SYS_CTRL, 0x1, 12), >> + .hdmi_en = VOP_REG(RK3229_SYS_CTRL, 0x1, 13), >> + .edp_en = VOP_REG(RK3229_SYS_CTRL, 0x1, 14), >> + .mipi_en = VOP_REG(RK3229_SYS_CTRL, 0x1, 15), >> + .data_blank = VOP_REG(RK3229_DSP_CTRL0, 0x1, 19), >> + .out_mode = VOP_REG(RK3229_DSP_CTRL0, 0xf, 0), >> + .pin_pol = VOP_REG(RK3229_DSP_CTRL1, 0xf, 20), >> + .dither_up = VOP_REG(RK3229_DSP_CTRL1, 0x1, 6), >> + .htotal_pw = VOP_REG(RK3229_DSP_HTOTAL_HS_END, 0x1fff1fff, 0), >> + .hact_st_end = VOP_REG(RK3229_DSP_HACT_ST_END, 0x1fff1fff, 0), >> + .vtotal_pw = VOP_REG(RK3229_DSP_VTOTAL_VS_END, 0x1fff1fff, 0), >> + .vact_st_end = VOP_REG(RK3229_DSP_VACT_ST_END, 0x1fff1fff, 0), >> + .hpost_st_end = VOP_REG(RK3229_POST_DSP_HACT_INFO, 0x1fff1fff, 0), >> + .vpost_st_end = VOP_REG(RK3229_POST_DSP_VACT_INFO, 0x1fff1fff, 0), >> +}; > > Hi Yakir > > RK3229 registers layout is simalar to RK3288 layout, is possible to > reuse rk3288 register table? > > rk3229_ctrl_data & rk3229_win01_data seems same as rk3288_ctrl_data & > rk3288_win01_data. > Great, glad to do that :) - Yakir > Thanks. >