From mboxrd@z Thu Jan 1 00:00:00 1970 From: Archit Taneja Subject: Re: [PATCH v2 1/2] drm: bridge: sil902x Date: Thu, 7 Jan 2016 11:12:47 +0530 Message-ID: <568DFAD7.6030003@codeaurora.org> References: <1452079551-30914-1-git-send-email-boris.brezillon@free-electrons.com> <1452083126-18211-1-git-send-email-boris.brezillon@free-electrons.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; Format="flowed" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1452083126-18211-1-git-send-email-boris.brezillon@free-electrons.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Boris Brezillon , David Airlie , Daniel Vetter , dri-devel@lists.freedesktop.org Cc: Mark Rutland , devicetree@vger.kernel.org, Pawel Moll , Ian Campbell , Nicolas Ferre , linux-kernel@vger.kernel.org, Rob Herring , Alexandre Belloni , Kumar Gala , Jean-Christophe Plagniol-Villard List-Id: devicetree@vger.kernel.org CgpPbiAwMS8wNi8yMDE2IDA1OjU1IFBNLCBCb3JpcyBCcmV6aWxsb24gd3JvdGU6Cj4gQWRkIGJh c2ljIHN1cHBvcnQgZm9yIHRoZSBzaWw5MDJ4IFJHQiAtPiBIRE1JIGJyaWRnZS4KPiBUaGlzIGRy aXZlciBkb2VzIG5vdCBzdXBwb3J0IGF1ZGlvIG91dHB1dCB5ZXQuCj4KPiBTaWduZWQtb2ZmLWJ5 OiBCb3JpcyBCcmV6aWxsb24gPGJvcmlzLmJyZXppbGxvbkBmcmVlLWVsZWN0cm9ucy5jb20+Cj4g LS0tCj4gSGVsbG8sCj4KPiBUaGlzIHBhdGNoIGlzIG9ubHkgYWRkaW5nIGJhc2ljIHN1cHBvcnQg Zm9yIHRoZSBzaWw5MDIyIGNoaXAuCj4gQXMgc3RhdGVkIGluIHRoZSBjb21taXQgbG9nLCB0aGVy ZSdzIG5vIGF1ZGlvIHN1cHBvcnQsIGJ1dCB0aGUKPiBkcml2ZXIgYWxzbyBoYXJkY29kZXMgYSBs b3Qgb2YgdGhpbmdzIChsaWtlIHRoZSBSR0IgaW5wdXQgZm9ybWF0IHRvCj4gdXNlKS4KPiBUaGVy ZSBhcmUgdHdvIHJlYXNvbnMgZm9yIHRoaXM6Cj4gMS8gdGhlIERSTSBmcmFtZXdvcmsgZG9lcyBu b3QgYWxsb3cgZm9yIGFkdmFuY2VkIGxpbmsgZGVzY3JpcHRpb24KPiAgICAgYmV0d2VlbiBhbiBl bmNvZGVyIGFuZCBhIGJyaWRnZSAodGhhdCdzIGZvciB0aGUgUkdCIGZvcm1hdAo+ICAgICBsaW1p dGF0aW9uKS4gQW55IGlkZWEgaG93IHRoaXMgc2hvdWxkIGJlIGRlc2NyaWJlZD8KClRoZSBhZHY3 NTExIGRyaXZlciB1c2VzIGEgRFQgcGFyYW0gImlucHV0X2NvbG9yc3BhY2UiIHRvIGNob3NlIGJl dHdlZW4KUkdCIG9yIFlVVi4gSSBkb24ndCB0aGluayBEVCBpcyB0aGUgYmVzdCBpZGVhLCBidXQg SSBkb24ndCBrbm93IG9mIGEKYmV0dGVyIHdheSBlaXRoZXIuCgpUaGUgY29ubmVjdG9yJ3MgZGlz cGxheV9pbmZvLmNvbG9yX2Zvcm1hdHMgZmllbGQgZ2l2ZXMgdXMgc29tZSBpbmZvCmFib3V0IHRo ZSBjb2xvciBmb3JtYXRzIHN1cHBvcnRlZCBieSB0aGUgbW9uaXRvciwgYnV0IEkgZ3Vlc3MgdGhh dAppc24ndCBzdWZmaWNpZW50IGRhdGEgdG8ga25vdyB3aGF0IGZvcm1hdCB0aGUgZW5jb2RlciBp cyBwdXNoaW5nIG91dC4KCldlIGdldCBhcm91bmQgdGhpcyBwcm9ibGVtIGluIGNhc2UgdGhlIGNh c2Ugb2YgRFNJIGVuY29kZXJzIGJ5IHVzaW5nCnRoZSBtaXBpX2RzaV9kZXZpY2UgYXBpLCB3aGVy ZSBhIERTSSBiYXNlZCBicmlkZ2Ugb3IgcGFuZWwgY2FuIHBhc3MKY29sb3IgZm9ybWF0L2xhbmUg aW5mbyB0byB0aGUgRFNJIGhvc3QgKGkuZSwgZW5jb2RlcikgYnkgdXNpbmcKbWlwaV9kc2lfYXR0 YWNoKCkuCgoKPgo+IDIvIEkgZG9uJ3QgaGF2ZSB0aGUgZGF0YXNoZWV0IG9mIHRoaXMgSERNSSBl bmNvZGVyLCBhbmQgYWxsIGxvZ2ljCj4gICAgIGhhcyBiZWVuIGV4dHJhY3RlZCBmcm9tIHRob3Nl IHR3byBkcml2ZXJzIFsxXVsyXSwgd2hpY2ggbWVhbnMKPiAgICAgSSBtYXkgbWlzcyBzb21lIGlt cG9ydGFudCB0aGluZ3MgaW4gbXkgZW5jb2RlciBzZXR1cC4KPgo+IEFub3RoZXIgdGhpbmcgSSBm aW5kIHdlaXJkIGluIHRoZSBkcm1fYnJpZGdlIGludGVyZmFjZSBpcyB0aGUgZmFjdAo+IHRoYXQg d2UgaGF2ZSBhIC0+YXR0YWNoKCkgbWV0aG9kLCBidXQgbm8gLT5kZXRhY2goKSwgd2hpY2ggY2Fu IGJlCj4gYSBwcm9ibGVtIGlmIHdlIGFsbG93IGRybSBicmlkZ2VzIGFuZCBLTVMgZHJpdmVycyB0 byBiZSBjb21waWxlZCBhcwo+IG1vZHVsZXMuIEFueSByZWFzb24gZm9yIHRoYXQ/CgpJIGd1ZXNz IHRoZSBkcm1fYnJpZGdlX2FkZC9yZW1vdmUgb3BzIG1ha2UgY2FuIGVuc3VyZSB0aGF0IHRoZSBi cmlkZ2UKZHJpdmVyIGl0c2VsZiBjYW4gYmUgY29tcGlsZWQgYXMgYSBtb2R1bGUuIEhvd2V2ZXIs IHlvdSdyZSByaWdodCB0aGF0CndlIHdvdWxkIG5lZWQgYSBicmlkZ2UgZGV0YWNoIG9wIHRoYXQg dGhlIGttcyBkcml2ZXIgc2hvdWxkIGNhbGwKYmVmb3JlIGl0IGlzIHJlbW92ZWQgKHRvIHVucmVn aXN0ZXIgdGhlIGNvbm5lY3RvciB3ZSBjcmVhdGVkKS4KClNvbWVvbmUgd291bGQgc3RpbGwgbmVl ZCB0byBtYWtlIHN1cmUgYWJvdXQgdGhlIG9yZGVyIGluIHdoaWNoIHRoZQptb2R1bGVzIGFyZSBy ZW1vdmVkLiBJZiB0aGUgYnJpZGdlIGRyaXZlciBpcyByZW1vdmVkIGZpcnN0LCB0aGVuCml0IHdv dWxkIHJlYWxseSBtZXNzIHVwIHRoZSBrbXMgZHJpdmVyIHVzaW5nIHRoZSBicmlkZ2UuCgoKV291 bGQgdGhlIGttcyBkcml2ZXIgdXNpbmcgdGhpcyBjaGlwIHJlYWxseSBoYXZlIGFuIGVuY29kZXI/ ClNpbmNlIHRoZSBjaGlwIHRha2VzIGluIFJHQiBpbnB1dCwgSSdtIGFzc3VtaW5nIHRoYXQgdGhl IGVuY29kZXIgaW4KdGhlIGttcyBkcml2ZXIgd291bGQgbW9yZSBvciBsZXNzIGJlIG5vcCBmdW5j cywgZ2l2aW5nIHRoZWlyIHdheSB0bwpicmlkZ2Ugb3BzLgoKSW4gc3VjaCBjYXNlcywgSSB0aGlu ayB0aGUgYnJpZGdlIHN0aWxsIGRvZXNuJ3QgZml0IGluIHNvIHdlbGwuIFRoZQpiZXN0IGZpdCBo ZXJlIGlzIGhvdyB0aGUgY3VycmVudCB0ZGE5OTh4IGRyaXZlciBpcyBtb2RlbGVkLiBJdCBhZGRz Cml0c2VsZiBhcyBhIGNvbXBvbmVudCB0aGF0IGNyZWF0ZXMgYm90aCBhbiBlbmNvZGVyIGFuZCBj b25uZWN0b3IsCndoaWNoIHRoZSBrbXMgZHJpdmVyIGNhbiB1c2UgZGlyZWN0bHkuIFRoaXMgYXBw cm9hY2gsIG9mIGNvdXJzZSwKcHJldmVudHMgdXMgdXNpbmcgdGRhOTk4eCBpbiBrbXMgZHJpdmVy cyB0aGF0IGRvbid0IGFjY2VwdCBhbnkKZW5jb2RlcnMgdGhhdCBpdCBkaWRuJ3QgY3JlYXRlIGl0 c2VsZi4KClRoYW5rcywKQXJjaGl0Cgo+Cj4gVGhhdCdzIGFsbCBmb3IgdGhlIHF1ZXN0aW9ucyBw YXJ0IDotKS4KPgo+IEJlc3QgUmVnYXJkcywKPgo+IEJvcmlzCj4KPiBDaGFuZ2VzIGluIHYyOgo+ IC0gZml4IGVycm9ycyByZXBvcnRlZCBieSBrYnVpbGQgdGVzdCByb2JvdAo+Cj4gLS0tCj4gICBk cml2ZXJzL2dwdS9kcm0vYnJpZGdlL0tjb25maWcgICB8ICAgOCArCj4gICBkcml2ZXJzL2dwdS9k cm0vYnJpZGdlL01ha2VmaWxlICB8ICAgMSArCj4gICBkcml2ZXJzL2dwdS9kcm0vYnJpZGdlL3Np bDkwMnguYyB8IDQ5MSArKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysKPiAg IDMgZmlsZXMgY2hhbmdlZCwgNTAwIGluc2VydGlvbnMoKykKPiAgIGNyZWF0ZSBtb2RlIDEwMDY0 NCBkcml2ZXJzL2dwdS9kcm0vYnJpZGdlL3NpbDkwMnguYwo+Cj4gZGlmZiAtLWdpdCBhL2RyaXZl cnMvZ3B1L2RybS9icmlkZ2UvS2NvbmZpZyBiL2RyaXZlcnMvZ3B1L2RybS9icmlkZ2UvS2NvbmZp Zwo+IGluZGV4IDI3ZTIwMjIuLjk3MDFmZDIgMTAwNjQ0Cj4gLS0tIGEvZHJpdmVycy9ncHUvZHJt L2JyaWRnZS9LY29uZmlnCj4gKysrIGIvZHJpdmVycy9ncHUvZHJtL2JyaWRnZS9LY29uZmlnCj4g QEAgLTQwLDQgKzQwLDEyIEBAIGNvbmZpZyBEUk1fUEFSQURFX1BTODYyMgo+ICAgCS0tLWhlbHAt LS0KPiAgIAkgIFBhcmFkZSBlRFAtTFZEUyBicmlkZ2UgY2hpcCBkcml2ZXIuCj4KPiArY29uZmln IERSTV9TSUw5MDJYCj4gKwl0cmlzdGF0ZSAiU2lsaWNvbiBJbWFnZSBzaWw5MDJ4IFJHQi9IRE1J IGJyaWRnZSIKPiArCWRlcGVuZHMgb24gT0YKPiArCXNlbGVjdCBEUk1fS01TX0hFTFBFUgo+ICsJ c2VsZWN0IFJFR01BUF9JMkMKPiArCS0tLWhlbHAtLS0KPiArCSAgU2lsaWNvbiBJbWFnZSBzaWw5 MDJ4IGJyaWRnZSBjaGlwIGRyaXZlci4KPiArCj4gICBlbmRtZW51Cj4gZGlmZiAtLWdpdCBhL2Ry aXZlcnMvZ3B1L2RybS9icmlkZ2UvTWFrZWZpbGUgYi9kcml2ZXJzL2dwdS9kcm0vYnJpZGdlL01h a2VmaWxlCj4gaW5kZXggZjEzYzMzZC4uYTY4OWFhZCAxMDA2NDQKPiAtLS0gYS9kcml2ZXJzL2dw dS9kcm0vYnJpZGdlL01ha2VmaWxlCj4gKysrIGIvZHJpdmVycy9ncHUvZHJtL2JyaWRnZS9NYWtl ZmlsZQo+IEBAIC00LDMgKzQsNCBAQCBvYmotJChDT05GSUdfRFJNX0RXX0hETUkpICs9IGR3LWhk bWkubwo+ICAgb2JqLSQoQ09ORklHX0RSTV9EV19IRE1JX0FIQl9BVURJTykgKz0gZHctaGRtaS1h aGItYXVkaW8ubwo+ICAgb2JqLSQoQ09ORklHX0RSTV9OWFBfUFROMzQ2MCkgKz0gbnhwLXB0bjM0 NjAubwo+ICAgb2JqLSQoQ09ORklHX0RSTV9QQVJBREVfUFM4NjIyKSArPSBwYXJhZGUtcHM4NjIy Lm8KPiArb2JqLSQoQ09ORklHX0RSTV9TSUw5MDJYKSArPSBzaWw5MDJ4Lm8KPiBkaWZmIC0tZ2l0 IGEvZHJpdmVycy9ncHUvZHJtL2JyaWRnZS9zaWw5MDJ4LmMgYi9kcml2ZXJzL2dwdS9kcm0vYnJp ZGdlL3NpbDkwMnguYwo+IG5ldyBmaWxlIG1vZGUgMTAwNjQ0Cj4gaW5kZXggMDAwMDAwMC4uMjY1 NzAzMQo+IC0tLSAvZGV2L251bGwKPiArKysgYi9kcml2ZXJzL2dwdS9kcm0vYnJpZGdlL3NpbDkw MnguYwo+IEBAIC0wLDAgKzEsNDkxIEBACj4gKy8qCj4gKyAqIENvcHlyaWdodCAoQykgMjAxNCBB dG1lbAo+ICsgKgkJICAgICAgQm8gU2hlbiA8dm9pY2Uuc2hlbkBhdG1lbC5jb20+Cj4gKyAqCj4g KyAqIEF1dGhvcnM6CSAgICAgIEJvIFNoZW4gPHZvaWNlLnNoZW5AYXRtZWwuY29tPgo+ICsgKgkJ ICAgICAgQm9yaXMgQnJlemlsbG9uIDxib3Jpcy5icmV6aWxsb25AZnJlZS1lbGVjdHJvbnMuY29t Pgo+ICsgKgkJICAgICAgV3UsIFNvbmdqdW4gPFNvbmdqdW4uV3VAYXRtZWwuY29tPgo+ICsgKgo+ ICsgKgo+ICsgKiBDb3B5cmlnaHQgKEMpIDIwMTAtMjAxMSBGcmVlc2NhbGUgU2VtaWNvbmR1Y3Rv ciwgSW5jLiBBbGwgUmlnaHRzIFJlc2VydmVkLgo+ICsgKgo+ICsgKiBUaGlzIHByb2dyYW0gaXMg ZnJlZSBzb2Z0d2FyZTsgeW91IGNhbiByZWRpc3RyaWJ1dGUgaXQgYW5kL29yIG1vZGlmeQo+ICsg KiBpdCB1bmRlciB0aGUgdGVybXMgb2YgdGhlIEdOVSBHZW5lcmFsIFB1YmxpYyBMaWNlbnNlIGFz IHB1Ymxpc2hlZCBieQo+ICsgKiB0aGUgRnJlZSBTb2Z0d2FyZSBGb3VuZGF0aW9uOyBlaXRoZXIg dmVyc2lvbiAyIG9mIHRoZSBMaWNlbnNlLCBvcgo+ICsgKiAoYXQgeW91ciBvcHRpb24pIGFueSBs YXRlciB2ZXJzaW9uLgo+ICsgKgo+ICsgKiBUaGlzIHByb2dyYW0gaXMgZGlzdHJpYnV0ZWQgaW4g dGhlIGhvcGUgdGhhdCBpdCB3aWxsIGJlIHVzZWZ1bCwKPiArICogYnV0IFdJVEhPVVQgQU5ZIFdB UlJBTlRZOyB3aXRob3V0IGV2ZW4gdGhlIGltcGxpZWQgd2FycmFudHkgb2YKPiArICogTUVSQ0hB TlRBQklMSVRZIG9yIEZJVE5FU1MgRk9SIEEgUEFSVElDVUxBUiBQVVJQT1NFLiAgU2VlIHRoZQo+ ICsgKiBHTlUgR2VuZXJhbCBQdWJsaWMgTGljZW5zZSBmb3IgbW9yZSBkZXRhaWxzLgo+ICsgKi8K PiArCj4gKyNpbmNsdWRlIDxsaW51eC9jb21wb25lbnQuaD4KPiArI2luY2x1ZGUgPGxpbnV4L2dw aW8vY29uc3VtZXIuaD4KPiArI2luY2x1ZGUgPGxpbnV4L2kyYy5oPgo+ICsjaW5jbHVkZSA8bGlu dXgvbW9kdWxlLmg+Cj4gKyNpbmNsdWRlIDxsaW51eC9vZi5oPgo+ICsjaW5jbHVkZSA8bGludXgv b2ZfZ3Bpby5oPgo+ICsjaW5jbHVkZSA8bGludXgvcmVnbWFwLmg+Cj4gKwo+ICsjaW5jbHVkZSA8 ZHJtL2RybVAuaD4KPiArI2luY2x1ZGUgPGRybS9kcm1fYXRvbWljLmg+Cj4gKyNpbmNsdWRlIDxk cm0vZHJtX2F0b21pY19oZWxwZXIuaD4KPiArI2luY2x1ZGUgPGRybS9kcm1fY3J0Y19oZWxwZXIu aD4KPiArI2luY2x1ZGUgPGRybS9kcm1fZWRpZC5oPgo+ICsjaW5jbHVkZSA8ZHJtL2RybV9lbmNv ZGVyX3NsYXZlLmg+Cj4gKwo+ICsjZGVmaW5lIFNJTDkwMlhfVFBJX1ZJREVPX0RBVEEJCQkweDAK PiArCj4gKyNkZWZpbmUgU0lMOTAyWF9UUElfUElYRUxfUkVQRVRJVElPTgkJMHg4Cj4gKyNkZWZp bmUgU0lMOTAyWF9UUElfQVZJX1BJWEVMX1JFUF9CVVNfMjRCSVQgICAgIEJJVCg1KQo+ICsjZGVm aW5lIFNJTDkwMlhfVFBJX0FWSV9QSVhFTF9SRVBfUklTSU5HX0VER0UgICBCSVQoNCkKPiArI2Rl ZmluZSBTSUw5MDJYX1RQSV9BVklfUElYRUxfUkVQXzRYCQkzCj4gKyNkZWZpbmUgU0lMOTAyWF9U UElfQVZJX1BJWEVMX1JFUF8yWAkJMQo+ICsjZGVmaW5lIFNJTDkwMlhfVFBJX0FWSV9QSVhFTF9S RVBfTk9ORQkJMAo+ICsjZGVmaW5lIFNJTDkwMlhfVFBJX0NMS19SQVRJT19IQUxGCQkoMCA8PCA2 KQo+ICsjZGVmaW5lIFNJTDkwMlhfVFBJX0NMS19SQVRJT18xWAkJKDEgPDwgNikKPiArI2RlZmlu ZSBTSUw5MDJYX1RQSV9DTEtfUkFUSU9fMlgJCSgyIDw8IDYpCj4gKyNkZWZpbmUgU0lMOTAyWF9U UElfQ0xLX1JBVElPXzRYCQkoMyA8PCA2KQo+ICsKPiArI2RlZmluZSBTSUw5MDJYX1RQSV9BVklf SU5fRk9STUFUCQkweDkKPiArI2RlZmluZSBTSUw5MDJYX1RQSV9BVklfSU5QVVRfQklUTU9ERV8x MkJJVAlCSVQoNykKPiArI2RlZmluZSBTSUw5MDJYX1RQSV9BVklfSU5QVVRfRElUSEVSCQlCSVQo NikKPiArI2RlZmluZSBTSUw5MDJYX1RQSV9BVklfSU5QVVRfUkFOR0VfTElNSVRFRAkoMiA8PCAy KQo+ICsjZGVmaW5lIFNJTDkwMlhfVFBJX0FWSV9JTlBVVF9SQU5HRV9GVUxMCSgxIDw8IDIpCj4g KyNkZWZpbmUgU0lMOTAyWF9UUElfQVZJX0lOUFVUX1JBTkdFX0FVVE8JKDAgPDwgMikKPiArI2Rl ZmluZSBTSUw5MDJYX1RQSV9BVklfSU5QVVRfQ09MT1JTUEFDRV9CTEFDSwkoMyA8PCAwKQo+ICsj ZGVmaW5lIFNJTDkwMlhfVFBJX0FWSV9JTlBVVF9DT0xPUlNQQUNFX1lVVjQyMgkoMiA8PCAwKQo+ ICsjZGVmaW5lIFNJTDkwMlhfVFBJX0FWSV9JTlBVVF9DT0xPUlNQQUNFX1lVVjQ0NAkoMSA8PCAw KQo+ICsjZGVmaW5lIFNJTDkwMlhfVFBJX0FWSV9JTlBVVF9DT0xPUlNQQUNFX1JHQgkoMCA8PCAw KQo+ICsKPiArI2RlZmluZSBTSUw5MDJYX1RQSV9BVklfSU5GT0ZSQU1FCQkweDBjCj4gKwo+ICsj ZGVmaW5lIFNJTDkwMlhfU1lTX0NUUkxfREFUQQkJCTB4MWEKPiArI2RlZmluZSBTSUw5MDJYX1NZ U19DVFJMX1BXUl9EV04JCUJJVCg0KQo+ICsjZGVmaW5lIFNJTDkwMlhfU1lTX0NUUkxfQVZfTVVU RQkJQklUKDMpCj4gKyNkZWZpbmUgU0lMOTAyWF9TWVNfQ1RSTF9ERENfQlVTX1JFUQkJQklUKDIp Cj4gKyNkZWZpbmUgU0lMOTAyWF9TWVNfQ1RSTF9ERENfQlVTX0dSVEQJCUJJVCgxKQo+ICsjZGVm aW5lIFNJTDkwMlhfU1lTX0NUUkxfT1VUUFVUX01PREUJCUJJVCgwKQo+ICsjZGVmaW5lIFNJTDkw MlhfU1lTX0NUUkxfT1VUUFVUX0hETUkJCTEKPiArI2RlZmluZSBTSUw5MDJYX1NZU19DVFJMX09V VFBVVF9EVkkJCTAKPiArCj4gKyNkZWZpbmUgU0lMOTAyWF9SRUdfQ0hJUElEKG4pCQkJKDB4MWIg KyAobikpCj4gKwo+ICsjZGVmaW5lIFNJTDkwMlhfUFdSX1NUQVRFX0NUUkwJCQkweDFlCj4gKyNk ZWZpbmUgU0lMOTAyWF9BVklfUE9XRVJfU1RBVEVfTVNLCQlHRU5NQVNLKDEsIDApCj4gKyNkZWZp bmUgU0lMOTAyWF9BVklfUE9XRVJfU1RBVEVfRChsKQkJKChsKSAmIFNJTDkwMlhfQVZJX1BPV0VS X1NUQVRFX01TSykKPiArCj4gKyNkZWZpbmUgU0k5MDJYX0lOVF9FTkFCTEUJCQkweDNjCj4gKyNk ZWZpbmUgU0k5MDJYX0lOVF9TVEFUVVMJCQkweDNkCj4gKyNkZWZpbmUgU0k5MDJYX0hPVFBMVUdf RVZFTlQJCQlCSVQoMCkKPiArI2RlZmluZSBTSTkwMlhfUExVR0dFRF9TVEFUVVMJCQlCSVQoMikK PiArCj4gKyNkZWZpbmUgU0lMOTAyWF9SRUdfVFBJX1JRQgkJCTB4YzcKPiArCj4gK3N0cnVjdCBz aWw5MDJ4IHsKPiArCXN0cnVjdCBpMmNfY2xpZW50ICppMmM7Cj4gKwlzdHJ1Y3QgcmVnbWFwICpy ZWdtYXA7Cj4gKwlzdHJ1Y3QgZHJtX2JyaWRnZSBicmlkZ2U7Cj4gKwlzdHJ1Y3QgZHJtX2Nvbm5l Y3RvciBjb25uZWN0b3I7Cj4gKwlzdHJ1Y3QgZ3Bpb19kZXNjICpyZXNldF9ncGlvOwo+ICsJc3Ry dWN0IHdvcmtfc3RydWN0IGhvdHBsdWdfd29yazsKPiArfTsKPiArCj4gK3N0YXRpYyBpbmxpbmUg c3RydWN0IHNpbDkwMnggKmJyaWRnZV90b19zaWw5MDJ4KHN0cnVjdCBkcm1fYnJpZGdlICpicmlk Z2UpCj4gK3sKPiArCXJldHVybiBjb250YWluZXJfb2YoYnJpZGdlLCBzdHJ1Y3Qgc2lsOTAyeCwg YnJpZGdlKTsKPiArfQo+ICsKPiArc3RhdGljIGlubGluZSBzdHJ1Y3Qgc2lsOTAyeCAqY29ubmVj dG9yX3RvX3NpbDkwMngoc3RydWN0IGRybV9jb25uZWN0b3IgKmNvbikKPiArewo+ICsJcmV0dXJu IGNvbnRhaW5lcl9vZihjb24sIHN0cnVjdCBzaWw5MDJ4LCBjb25uZWN0b3IpOwo+ICt9Cj4gKwo+ ICtzdGF0aWMgdm9pZCBzaWw5MDJ4X3Jlc2V0KHN0cnVjdCBzaWw5MDJ4ICpzaWw5MDJ4KQo+ICt7 Cj4gKwlncGlvZF9zZXRfdmFsdWUoc2lsOTAyeC0+cmVzZXRfZ3BpbywgMSk7Cj4gKwo+ICsJbXNs ZWVwKDEwMCk7Cj4gKwo+ICsJZ3Bpb2Rfc2V0X3ZhbHVlKHNpbDkwMngtPnJlc2V0X2dwaW8sIDAp Owo+ICt9Cj4gKwo+ICtzdGF0aWMgdm9pZCBzaWw5MDJ4X2Nvbm5lY3Rvcl9kZXN0cm95KHN0cnVj dCBkcm1fY29ubmVjdG9yICpjb25uZWN0b3IpCj4gK3sKPiArCWRybV9jb25uZWN0b3JfdW5yZWdp c3Rlcihjb25uZWN0b3IpOwo+ICsJZHJtX2Nvbm5lY3Rvcl9jbGVhbnVwKGNvbm5lY3Rvcik7Cj4g K30KPiArCj4gK3N0YXRpYyBlbnVtIGRybV9jb25uZWN0b3Jfc3RhdHVzCj4gK3NpbDkwMnhfY29u bmVjdG9yX2RldGVjdChzdHJ1Y3QgZHJtX2Nvbm5lY3RvciAqY29ubmVjdG9yLCBib29sIGZvcmNl KQo+ICt7Cj4gKwlzdHJ1Y3Qgc2lsOTAyeCAqc2lsOTAyeCA9IGNvbm5lY3Rvcl90b19zaWw5MDJ4 KGNvbm5lY3Rvcik7Cj4gKwl1bnNpZ25lZCBpbnQgc3RhdHVzOwo+ICsKPiArCXJlZ21hcF9yZWFk KHNpbDkwMngtPnJlZ21hcCwgU0k5MDJYX0lOVF9TVEFUVVMsICZzdGF0dXMpOwo+ICsKPiArCXJl dHVybiAoc3RhdHVzICYgU0k5MDJYX1BMVUdHRURfU1RBVFVTKSA/Cj4gKwkgICAgICAgY29ubmVj dG9yX3N0YXR1c19jb25uZWN0ZWQgOiBjb25uZWN0b3Jfc3RhdHVzX2Rpc2Nvbm5lY3RlZDsKPiAr fQo+ICsKPiArc3RhdGljIGNvbnN0IHN0cnVjdCBkcm1fY29ubmVjdG9yX2Z1bmNzIHNpbDkwMnhf YXRvbWljX2Nvbm5lY3Rvcl9mdW5jcyA9IHsKPiArCS5kcG1zID0gZHJtX2F0b21pY19oZWxwZXJf Y29ubmVjdG9yX2RwbXMsCj4gKwkuZGV0ZWN0ID0gc2lsOTAyeF9jb25uZWN0b3JfZGV0ZWN0LAo+ ICsJLmZpbGxfbW9kZXMgPSBkcm1faGVscGVyX3Byb2JlX3NpbmdsZV9jb25uZWN0b3JfbW9kZXMs Cj4gKwkuZGVzdHJveSA9IHNpbDkwMnhfY29ubmVjdG9yX2Rlc3Ryb3ksCj4gKwkucmVzZXQgPSBk cm1fYXRvbWljX2hlbHBlcl9jb25uZWN0b3JfcmVzZXQsCj4gKwkuYXRvbWljX2R1cGxpY2F0ZV9z dGF0ZSA9IGRybV9hdG9taWNfaGVscGVyX2Nvbm5lY3Rvcl9kdXBsaWNhdGVfc3RhdGUsCj4gKwku YXRvbWljX2Rlc3Ryb3lfc3RhdGUgPSBkcm1fYXRvbWljX2hlbHBlcl9jb25uZWN0b3JfZGVzdHJv eV9zdGF0ZSwKPiArfTsKPiArCj4gK3N0YXRpYyBjb25zdCBzdHJ1Y3QgZHJtX2Nvbm5lY3Rvcl9m dW5jcyBzaWw5MDJ4X2Nvbm5lY3Rvcl9mdW5jcyA9IHsKPiArCS5kcG1zID0gZHJtX2F0b21pY19o ZWxwZXJfY29ubmVjdG9yX2RwbXMsCj4gKwkuZGV0ZWN0ID0gc2lsOTAyeF9jb25uZWN0b3JfZGV0 ZWN0LAo+ICsJLmZpbGxfbW9kZXMgPSBkcm1faGVscGVyX3Byb2JlX3NpbmdsZV9jb25uZWN0b3Jf bW9kZXMsCj4gKwkuZGVzdHJveSA9IHNpbDkwMnhfY29ubmVjdG9yX2Rlc3Ryb3ksCj4gK307Cj4g Kwo+ICtzdGF0aWMgaW50IHNpbDkwMnhfZ2V0X21vZGVzKHN0cnVjdCBkcm1fY29ubmVjdG9yICpj b25uZWN0b3IpCj4gK3sKPiArCXN0cnVjdCBzaWw5MDJ4ICpzaWw5MDJ4ID0gY29ubmVjdG9yX3Rv X3NpbDkwMngoY29ubmVjdG9yKTsKPiArCXN0cnVjdCByZWdtYXAgKnJlZ21hcCA9IHNpbDkwMngt PnJlZ21hcDsKPiArCXUzMiBidXNfZm9ybWF0ID0gTUVESUFfQlVTX0ZNVF9SR0I4ODhfMVgyNDsK PiArCXVuc2lnbmVkIGludCBzdGF0dXM7Cj4gKwlzdHJ1Y3QgZWRpZCAqZWRpZDsKPiArCWludCBu dW0gPSAwOwo+ICsJaW50IHJldDsKPiArCWludCBpOwo+ICsKPiArCXJldCA9IHJlZ21hcF91cGRh dGVfYml0cyhyZWdtYXAsIFNJTDkwMlhfUFdSX1NUQVRFX0NUUkwsCj4gKwkJCQkgU0lMOTAyWF9B VklfUE9XRVJfU1RBVEVfTVNLLAo+ICsJCQkJIFNJTDkwMlhfQVZJX1BPV0VSX1NUQVRFX0QoMikp Owo+ICsJaWYgKHJldCkKPiArCQlyZXR1cm4gcmV0Owo+ICsKPiArCXJldCA9IHJlZ21hcF93cml0 ZShyZWdtYXAsIFNJTDkwMlhfU1lTX0NUUkxfREFUQSwKPiArCQkJICAgU0lMOTAyWF9TWVNfQ1RS TF9PVVRQVVRfSERNSSB8Cj4gKwkJCSAgIFNJTDkwMlhfU1lTX0NUUkxfUFdSX0RXTik7Cj4gKwlp ZiAocmV0KQo+ICsJCXJldHVybiByZXQ7Cj4gKwo+ICsJcmV0ID0gcmVnbWFwX3VwZGF0ZV9iaXRz KHJlZ21hcCwgU0lMOTAyWF9TWVNfQ1RSTF9EQVRBLAo+ICsJCQkJIFNJTDkwMlhfU1lTX0NUUkxf RERDX0JVU19SRVEsCj4gKwkJCQkgU0lMOTAyWF9TWVNfQ1RSTF9ERENfQlVTX1JFUSk7Cj4gKwlp ZiAocmV0KQo+ICsJCXJldHVybiByZXQ7Cj4gKwo+ICsJaSA9IDA7Cj4gKwlkbyB7Cj4gKwkJcmV0 ID0gcmVnbWFwX3JlYWQocmVnbWFwLCBTSUw5MDJYX1NZU19DVFJMX0RBVEEsICZzdGF0dXMpOwo+ ICsJCWlmIChyZXQpCj4gKwkJCXJldHVybiByZXQ7Cj4gKwkJaSsrOwo+ICsJfSB3aGlsZSAoIShz dGF0dXMgJiBTSUw5MDJYX1NZU19DVFJMX0REQ19CVVNfR1JURCkpOwo+ICsKPiArCXJldCA9IHJl Z21hcF93cml0ZShyZWdtYXAsIFNJTDkwMlhfU1lTX0NUUkxfREFUQSwgc3RhdHVzKTsKPiArCWlm IChyZXQpCj4gKwkJcmV0dXJuIHJldDsKPiArCj4gKwllZGlkID0gZHJtX2dldF9lZGlkKGNvbm5l Y3Rvciwgc2lsOTAyeC0+aTJjLT5hZGFwdGVyKTsKPiArCWRybV9tb2RlX2Nvbm5lY3Rvcl91cGRh dGVfZWRpZF9wcm9wZXJ0eShjb25uZWN0b3IsIGVkaWQpOwo+ICsJaWYgKGVkaWQpIHsKPiArCQlu dW0gKz0gZHJtX2FkZF9lZGlkX21vZGVzKGNvbm5lY3RvciwgZWRpZCk7Cj4gKwkJa2ZyZWUoZWRp ZCk7Cj4gKwl9Cj4gKwo+ICsJcmV0ID0gZHJtX2Rpc3BsYXlfaW5mb19zZXRfYnVzX2Zvcm1hdHMo JmNvbm5lY3Rvci0+ZGlzcGxheV9pbmZvLAo+ICsJCQkJCSAgICAgICAmYnVzX2Zvcm1hdCwgMSk7 Cj4gKwlpZiAocmV0KQo+ICsJCXJldHVybiByZXQ7Cj4gKwo+ICsJcmVnbWFwX3JlYWQocmVnbWFw LCBTSUw5MDJYX1NZU19DVFJMX0RBVEEsICZzdGF0dXMpOwo+ICsJaWYgKHJldCkKPiArCQlyZXR1 cm4gcmV0Owo+ICsKPiArCXJldCA9IHJlZ21hcF91cGRhdGVfYml0cyhyZWdtYXAsIFNJTDkwMlhf U1lTX0NUUkxfREFUQSwKPiArCQkJCSBTSUw5MDJYX1NZU19DVFJMX0REQ19CVVNfUkVRIHwKPiAr CQkJCSBTSUw5MDJYX1NZU19DVFJMX0REQ19CVVNfR1JURCwgMCk7Cj4gKwlpZiAocmV0KQo+ICsJ CXJldHVybiByZXQ7Cj4gKwo+ICsJaSA9IDA7Cj4gKwlkbyB7Cj4gKwkJcmV0ID0gcmVnbWFwX3Jl YWQocmVnbWFwLCBTSUw5MDJYX1NZU19DVFJMX0RBVEEsICZzdGF0dXMpOwo+ICsJCWlmIChyZXQp Cj4gKwkJCXJldHVybiByZXQ7Cj4gKwkJaSsrOwo+ICsJfSB3aGlsZSAoc3RhdHVzICYgKFNJTDkw MlhfU1lTX0NUUkxfRERDX0JVU19SRVEgfAo+ICsJCQkgICBTSUw5MDJYX1NZU19DVFJMX0REQ19C VVNfR1JURCkpOwo+ICsKPiArCXJldHVybiBudW07Cj4gK30KPiArCj4gK3N0YXRpYyBlbnVtIGRy bV9tb2RlX3N0YXR1cyBzaWw5MDJ4X21vZGVfdmFsaWQoc3RydWN0IGRybV9jb25uZWN0b3IgKmNv bm5lY3RvciwKPiArCQkJCQkgICAgICAgc3RydWN0IGRybV9kaXNwbGF5X21vZGUgKm1vZGUpCj4g K3sKPiArCS8qIFRPRE86IGNoZWNrIG1vZGUgKi8KPiArCj4gKwlyZXR1cm4gTU9ERV9PSzsKPiAr fQo+ICsKPiArc3RhdGljIHN0cnVjdCBkcm1fZW5jb2RlciAqc2lsOTAyeF9iZXN0X2VuY29kZXIo c3RydWN0IGRybV9jb25uZWN0b3IgKmNvbm5lY3RvcikKPiArewo+ICsJc3RydWN0IHNpbDkwMngg KnNpbDkwMnggPSBjb25uZWN0b3JfdG9fc2lsOTAyeChjb25uZWN0b3IpOwo+ICsKPiArCXJldHVy biBzaWw5MDJ4LT5icmlkZ2UuZW5jb2RlcjsKPiArfQo+ICsKPiArc3RhdGljIGNvbnN0IHN0cnVj dCBkcm1fY29ubmVjdG9yX2hlbHBlcl9mdW5jcyBzaWw5MDJ4X2Nvbm5lY3Rvcl9oZWxwZXJfZnVu Y3MgPSB7Cj4gKwkuZ2V0X21vZGVzID0gc2lsOTAyeF9nZXRfbW9kZXMsCj4gKwkubW9kZV92YWxp ZCA9IHNpbDkwMnhfbW9kZV92YWxpZCwKPiArCS5iZXN0X2VuY29kZXIgPSBzaWw5MDJ4X2Jlc3Rf ZW5jb2RlciwKPiArfTsKPiArCj4gK3N0YXRpYyB2b2lkIHNpbDkwMnhfYnJpZGdlX2Rpc2FibGUo c3RydWN0IGRybV9icmlkZ2UgKmJyaWRnZSkKPiArewo+ICsJc3RydWN0IHNpbDkwMnggKnNpbDkw MnggPSBicmlkZ2VfdG9fc2lsOTAyeChicmlkZ2UpOwo+ICsKPiArCXJlZ21hcF91cGRhdGVfYml0 cyhzaWw5MDJ4LT5yZWdtYXAsIFNJTDkwMlhfU1lTX0NUUkxfREFUQSwKPiArCQkJICAgU0lMOTAy WF9TWVNfQ1RSTF9QV1JfRFdOLAo+ICsJCQkgICBTSUw5MDJYX1NZU19DVFJMX1BXUl9EV04pOwo+ ICt9Cj4gKwo+ICtzdGF0aWMgdm9pZCBzaWw5MDJ4X2JyaWRnZV9lbmFibGUoc3RydWN0IGRybV9i cmlkZ2UgKmJyaWRnZSkKPiArewo+ICsJc3RydWN0IHNpbDkwMnggKnNpbDkwMnggPSBicmlkZ2Vf dG9fc2lsOTAyeChicmlkZ2UpOwo+ICsKPiArCXJlZ21hcF91cGRhdGVfYml0cyhzaWw5MDJ4LT5y ZWdtYXAsIFNJTDkwMlhfUFdSX1NUQVRFX0NUUkwsCj4gKwkJCSAgIFNJTDkwMlhfQVZJX1BPV0VS X1NUQVRFX01TSywKPiArCQkJICAgU0lMOTAyWF9BVklfUE9XRVJfU1RBVEVfRCgwKSk7Cj4gKwly ZWdtYXBfdXBkYXRlX2JpdHMoc2lsOTAyeC0+cmVnbWFwLCBTSUw5MDJYX1NZU19DVFJMX0RBVEEs Cj4gKwkJCSAgIFNJTDkwMlhfU1lTX0NUUkxfUFdSX0RXTiwgMCk7Cj4gK30KPiArCj4gK3N0YXRp YyB2b2lkIHNpbDkwMnhfYnJpZGdlX21vZGVfc2V0KHN0cnVjdCBkcm1fYnJpZGdlICpicmlkZ2Us Cj4gKwkJCQkgICAgc3RydWN0IGRybV9kaXNwbGF5X21vZGUgKm1vZGUsCj4gKwkJCQkgICAgc3Ry dWN0IGRybV9kaXNwbGF5X21vZGUgKmFkaikKPiArewo+ICsJdTggYnVmW0hETUlfSU5GT0ZSQU1F X0hFQURFUl9TSVpFICsgSERNSV9BVklfSU5GT0ZSQU1FX1NJWkVdOwo+ICsJc3RydWN0IHNpbDkw MnggKnNpbDkwMnggPSBicmlkZ2VfdG9fc2lsOTAyeChicmlkZ2UpOwo+ICsJc3RydWN0IHJlZ21h cCAqcmVnbWFwID0gc2lsOTAyeC0+cmVnbWFwOwo+ICsJc3RydWN0IGhkbWlfYXZpX2luZm9mcmFt ZSBmcmFtZTsKPiArCWludCByZXQ7Cj4gKwo+ICsJYnVmWzBdID0gYWRqLT5jbG9jazsKPiArCWJ1 ZlsxXSA9IGFkai0+Y2xvY2sgPj4gODsKPiArCWJ1ZlsyXSA9IGFkai0+dnJlZnJlc2g7Cj4gKwli dWZbM10gPSAweDAwOwo+ICsJYnVmWzRdID0gYWRqLT5oZGlzcGxheTsKPiArCWJ1Zls1XSA9IGFk ai0+aGRpc3BsYXkgPj4gODsKPiArCWJ1Zls2XSA9IGFkai0+dmRpc3BsYXk7Cj4gKwlidWZbN10g PSBhZGotPnZkaXNwbGF5ID4+IDg7Cj4gKwlidWZbOF0gPSBTSUw5MDJYX1RQSV9DTEtfUkFUSU9f MVggfCBTSUw5MDJYX1RQSV9BVklfUElYRUxfUkVQX05PTkUgfAo+ICsJCSBTSUw5MDJYX1RQSV9B VklfUElYRUxfUkVQX0JVU18yNEJJVDsKPiArCWJ1Zls5XSA9IFNJTDkwMlhfVFBJX0FWSV9JTlBV VF9SQU5HRV9BVVRPIHwKPiArCQkgU0lMOTAyWF9UUElfQVZJX0lOUFVUX0NPTE9SU1BBQ0VfUkdC Owo+ICsKPiArCXJldCA9IHJlZ21hcF9idWxrX3dyaXRlKHJlZ21hcCwgU0lMOTAyWF9UUElfVklE RU9fREFUQSwgYnVmLCAxMCk7Cj4gKwlpZiAocmV0KQo+ICsJCXJldHVybjsKPiArCj4gKwlyZXQg PSBkcm1faGRtaV9hdmlfaW5mb2ZyYW1lX2Zyb21fZGlzcGxheV9tb2RlKCZmcmFtZSwgYWRqKTsK PiArCWlmIChyZXQgPCAwKSB7Cj4gKwkJRFJNX0VSUk9SKCJjb3VsZG4ndCBmaWxsIEFWSSBpbmZv ZnJhbWVcbiIpOwo+ICsJCXJldHVybjsKPiArCX0KPiArCj4gKwlyZXQgPSBoZG1pX2F2aV9pbmZv ZnJhbWVfcGFjaygmZnJhbWUsIGJ1Ziwgc2l6ZW9mKGJ1ZikpOwo+ICsJaWYgKHJldCA8IDApIHsK PiArCQlEUk1fRVJST1IoImZhaWxlZCB0byBwYWNrIEFWSSBpbmZvZnJhbWU6ICV6ZFxuIiwgcmV0 KTsKPiArCQlyZXR1cm47Cj4gKwl9Cj4gKwo+ICsJLyogRG8gbm90IHNlbmQgdGhlIGluZm9mcmFt ZSBoZWFkZXIsIGJ1dCBrZWVwIHRoZSBDUkMgZmllbGQuICovCj4gKwlyZWdtYXBfYnVsa193cml0 ZShyZWdtYXAsIFNJTDkwMlhfVFBJX0FWSV9JTkZPRlJBTUUsCj4gKwkJCSAgYnVmICsgSERNSV9J TkZPRlJBTUVfSEVBREVSX1NJWkUgLSAxLAo+ICsJCQkgIEhETUlfQVZJX0lORk9GUkFNRV9TSVpF ICsgMSk7Cj4gK30KPiArCj4gK3N0YXRpYyBpbnQgc2lsOTAyeF9icmlkZ2VfYXR0YWNoKHN0cnVj dCBkcm1fYnJpZGdlICpicmlkZ2UpCj4gK3sKPiArCWNvbnN0IHN0cnVjdCBkcm1fY29ubmVjdG9y X2Z1bmNzICpmdW5jcyA9ICZzaWw5MDJ4X2Nvbm5lY3Rvcl9mdW5jczsKPiArCXN0cnVjdCBzaWw5 MDJ4ICpzaWw5MDJ4ID0gYnJpZGdlX3RvX3NpbDkwMngoYnJpZGdlKTsKPiArCXN0cnVjdCBkcm1f ZGV2aWNlICpkcm0gPSBicmlkZ2UtPmRldjsKPiArCWludCByZXQ7Cj4gKwo+ICsJZHJtX2Nvbm5l Y3Rvcl9oZWxwZXJfYWRkKCZzaWw5MDJ4LT5jb25uZWN0b3IsCj4gKwkJCQkgJnNpbDkwMnhfY29u bmVjdG9yX2hlbHBlcl9mdW5jcyk7Cj4gKwo+ICsJaWYgKGRybV9jb3JlX2NoZWNrX2ZlYXR1cmUo ZHJtLCBEUklWRVJfQVRPTUlDKSkKPiArCQlmdW5jcyA9ICZzaWw5MDJ4X2F0b21pY19jb25uZWN0 b3JfZnVuY3M7Cj4gKwo+ICsJcmV0ID0gZHJtX2Nvbm5lY3Rvcl9pbml0KGRybSwgJnNpbDkwMngt PmNvbm5lY3RvciwgZnVuY3MsCj4gKwkJCQkgRFJNX01PREVfQ09OTkVDVE9SX0hETUlBKTsKPiAr CWlmIChyZXQpCj4gKwkJcmV0dXJuIHJldDsKPiArCj4gKwlpZiAoc2lsOTAyeC0+aTJjLT5pcnEg PiAwKQo+ICsJCXNpbDkwMngtPmNvbm5lY3Rvci5wb2xsZWQgPSBEUk1fQ09OTkVDVE9SX1BPTExf SFBEOwo+ICsJZWxzZQo+ICsJCXNpbDkwMngtPmNvbm5lY3Rvci5wb2xsZWQgPSBEUk1fQ09OTkVD VE9SX1BPTExfQ09OTkVDVDsKPiArCj4gKwlkcm1fbW9kZV9jb25uZWN0b3JfYXR0YWNoX2VuY29k ZXIoJnNpbDkwMngtPmNvbm5lY3RvciwgYnJpZGdlLT5lbmNvZGVyKTsKPiArCj4gKwlyZXR1cm4g MDsKPiArfQo+ICsKPiArc3RhdGljIHZvaWQgc2lsOTAyeF9icmlkZ2Vfbm9wKHN0cnVjdCBkcm1f YnJpZGdlICpicmlkZ2UpCj4gK3sKPiArfQo+ICsKPiArc3RhdGljIGNvbnN0IHN0cnVjdCBkcm1f YnJpZGdlX2Z1bmNzIHNpbDkwMnhfYnJpZGdlX2Z1bmNzID0gewo+ICsJLmF0dGFjaCA9IHNpbDkw MnhfYnJpZGdlX2F0dGFjaCwKPiArCS5tb2RlX3NldCA9IHNpbDkwMnhfYnJpZGdlX21vZGVfc2V0 LAo+ICsJLmRpc2FibGUgPSBzaWw5MDJ4X2JyaWRnZV9kaXNhYmxlLAo+ICsJLnBvc3RfZGlzYWJs ZSA9IHNpbDkwMnhfYnJpZGdlX25vcCwKPiArCS5wcmVfZW5hYmxlID0gc2lsOTAyeF9icmlkZ2Vf bm9wLAo+ICsJLmVuYWJsZSA9IHNpbDkwMnhfYnJpZGdlX2VuYWJsZSwKPiArfTsKPiArCj4gK3N0 YXRpYyBjb25zdCBzdHJ1Y3QgcmVnbWFwX3JhbmdlIHNpbDkwMnhfdm9sYXRpbGVfcmFuZ2VzW10g PSB7Cj4gKwl7IC5yYW5nZV9taW4gPSAwLCAucmFuZ2VfbWF4ID0gMHhmZiB9LAo+ICt9Owo+ICsK PiArc3RhdGljIGNvbnN0IHN0cnVjdCByZWdtYXBfYWNjZXNzX3RhYmxlIHNpbDkwMnhfdm9sYXRp bGVfdGFibGUgPSB7Cj4gKwkueWVzX3JhbmdlcyA9IHNpbDkwMnhfdm9sYXRpbGVfcmFuZ2VzLAo+ ICsJLm5feWVzX3JhbmdlcyA9IEFSUkFZX1NJWkUoc2lsOTAyeF92b2xhdGlsZV9yYW5nZXMpLAo+ ICt9Owo+ICsKPiArc3RhdGljIGNvbnN0IHN0cnVjdCByZWdtYXBfY29uZmlnIHNpbDkwMnhfcmVn bWFwX2NvbmZpZyA9IHsKPiArCS5yZWdfYml0cyA9IDgsCj4gKwkudmFsX2JpdHMgPSA4LAo+ICsJ LnZvbGF0aWxlX3RhYmxlID0gJnNpbDkwMnhfdm9sYXRpbGVfdGFibGUsCj4gKwkuY2FjaGVfdHlw ZSA9IFJFR0NBQ0hFX05PTkUsCj4gK307Cj4gKwo+ICtzdGF0aWMgaXJxcmV0dXJuX3Qgc2lsOTAy eF9pbnRlcnJ1cHQoaW50IGlycSwgdm9pZCAqZGF0YSkKPiArewo+ICsJc3RydWN0IHNpbDkwMngg KnNpbDkwMnggPSBkYXRhOwo+ICsJdW5zaWduZWQgaW50IHN0YXR1cyA9IDA7Cj4gKwo+ICsJcmVn bWFwX3JlYWQoc2lsOTAyeC0+cmVnbWFwLCBTSTkwMlhfSU5UX1NUQVRVUywgJnN0YXR1cyk7Cj4g KwlyZWdtYXBfd3JpdGUoc2lsOTAyeC0+cmVnbWFwLCBTSTkwMlhfSU5UX1NUQVRVUywgc3RhdHVz KTsKPiArCj4gKwlpZiAoKHN0YXR1cyAmIFNJOTAyWF9IT1RQTFVHX0VWRU5UKSAmJiBzaWw5MDJ4 LT5icmlkZ2UuZGV2KQo+ICsJCWRybV9oZWxwZXJfaHBkX2lycV9ldmVudChzaWw5MDJ4LT5icmlk Z2UuZGV2KTsKPiArCj4gKwlyZXR1cm4gSVJRX0hBTkRMRUQ7Cj4gK30KPiArCj4gK3N0YXRpYyBp bnQgc2lsOTAyeF9wcm9iZShzdHJ1Y3QgaTJjX2NsaWVudCAqY2xpZW50LAo+ICsJCQkgY29uc3Qg c3RydWN0IGkyY19kZXZpY2VfaWQgKmlkKQo+ICt7Cj4gKwlzdHJ1Y3QgZGV2aWNlICpkZXYgPSAm Y2xpZW50LT5kZXY7Cj4gKwl1bnNpZ25lZCBpbnQgc3RhdHVzID0gMDsKPiArCXN0cnVjdCBzaWw5 MDJ4ICpzaWw5MDJ4Owo+ICsJdTggY2hpcGlkWzRdOwo+ICsJaW50IHJldDsKPiArCj4gKwlzaWw5 MDJ4ID0gZGV2bV9remFsbG9jKGRldiwgc2l6ZW9mKCpzaWw5MDJ4KSwgR0ZQX0tFUk5FTCk7Cj4g KwlpZiAoIXNpbDkwMngpCj4gKwkJcmV0dXJuIC1FTk9NRU07Cj4gKwo+ICsJc2lsOTAyeC0+aTJj ID0gY2xpZW50Owo+ICsJc2lsOTAyeC0+cmVnbWFwID0gZGV2bV9yZWdtYXBfaW5pdF9pMmMoY2xp ZW50LCAmc2lsOTAyeF9yZWdtYXBfY29uZmlnKTsKPiArCWlmIChJU19FUlIoc2lsOTAyeC0+cmVn bWFwKSkKPiArCQlyZXR1cm4gUFRSX0VSUihzaWw5MDJ4LT5yZWdtYXApOwo+ICsKPiArCXNpbDkw MngtPnJlc2V0X2dwaW8gPSBkZXZtX2dwaW9kX2dldChkZXYsICJyZXNldCIsIEdQSU9EX09VVF9M T1cpOwo+ICsJaWYgKElTX0VSUihzaWw5MDJ4LT5yZXNldF9ncGlvKSkgewo+ICsJCWRldl9lcnIo ZGV2LCAiRmFpbGVkIHRvIHJldHJpZXZlL3JlcXVlc3QgcmVzZXQgZ3BpbzogJWxkXG4iLAo+ICsJ CQlQVFJfRVJSKHNpbDkwMngtPnJlc2V0X2dwaW8pKTsKPiArCQlyZXR1cm4gUFRSX0VSUihzaWw5 MDJ4LT5yZXNldF9ncGlvKTsKPiArCX0KPiArCj4gKwlzaWw5MDJ4X3Jlc2V0KHNpbDkwMngpOwo+ ICsKPiArCXJldCA9IHJlZ21hcF93cml0ZShzaWw5MDJ4LT5yZWdtYXAsIFNJTDkwMlhfUkVHX1RQ SV9SUUIsIDB4MCk7Cj4gKwlpZiAocmV0KQo+ICsJCXJldHVybiByZXQ7Cj4gKwo+ICsJcmV0ID0g cmVnbWFwX2J1bGtfcmVhZChzaWw5MDJ4LT5yZWdtYXAsIFNJTDkwMlhfUkVHX0NISVBJRCgwKSwK PiArCQkJICAgICAgICZjaGlwaWQsIDQpOwo+ICsJaWYgKHJldCkgewo+ICsJCWRldl9lcnIoZGV2 LCAicmVnbWFwX3JlYWQgZmFpbGVkICVkXG4iLCByZXQpOwo+ICsJCXJldHVybiByZXQ7Cj4gKwl9 Cj4gKwo+ICsJaWYgKGNoaXBpZFswXSAhPSAweGIwKSB7Cj4gKwkJZGV2X2VycihkZXYsICJJbnZh bGlkIGNoaXBpZDogJTAyeCAoZXhwZWN0aW5nIDB4YjApXG4iLAo+ICsJCQljaGlwaWRbMF0pOwo+ ICsJCXJldHVybiAtRUlOVkFMOwo+ICsJfQo+ICsKPiArCS8qIENsZWFyIGFsbCBwZW5kaW5nIGlu dGVycnVwdHMgKi8KPiArCXJlZ21hcF9yZWFkKHNpbDkwMngtPnJlZ21hcCwgU0k5MDJYX0lOVF9T VEFUVVMsICZzdGF0dXMpOwo+ICsJcmVnbWFwX3dyaXRlKHNpbDkwMngtPnJlZ21hcCwgU0k5MDJY X0lOVF9TVEFUVVMsIHN0YXR1cyk7Cj4gKwo+ICsJaWYgKGNsaWVudC0+aXJxID4gMCkgewo+ICsJ CXJlZ21hcF93cml0ZShzaWw5MDJ4LT5yZWdtYXAsIFNJOTAyWF9JTlRfRU5BQkxFLAo+ICsJCQkg ICAgIFNJOTAyWF9IT1RQTFVHX0VWRU5UKTsKPiArCj4gKwkJcmV0ID0gZGV2bV9yZXF1ZXN0X3Ro cmVhZGVkX2lycShkZXYsIGNsaWVudC0+aXJxLCBOVUxMLAo+ICsJCQkJCQlzaWw5MDJ4X2ludGVy cnVwdCwKPiArCQkJCQkJSVJRRl9PTkVTSE9ULCBkZXZfbmFtZShkZXYpLAo+ICsJCQkJCQlzaWw5 MDJ4KTsKPiArCQlpZiAocmV0KQo+ICsJCQlyZXR1cm4gcmV0Owo+ICsJfQo+ICsKPiArCXNpbDkw MngtPmJyaWRnZS5mdW5jcyA9ICZzaWw5MDJ4X2JyaWRnZV9mdW5jczsKPiArCXNpbDkwMngtPmJy aWRnZS5vZl9ub2RlID0gZGV2LT5vZl9ub2RlOwo+ICsJcmV0ID0gZHJtX2JyaWRnZV9hZGQoJnNp bDkwMngtPmJyaWRnZSk7Cj4gKwlpZiAocmV0KSB7Cj4gKwkJZGV2X2VycihkZXYsICJGYWlsZWQg dG8gYWRkIGRybV9icmlkZ2VcbiIpOwo+ICsJCXJldHVybiByZXQ7Cj4gKwl9Cj4gKwo+ICsJaTJj X3NldF9jbGllbnRkYXRhKGNsaWVudCwgc2lsOTAyeCk7Cj4gKwo+ICsJcmV0dXJuIDA7Cj4gK30K PiArCj4gK3N0YXRpYyBpbnQgc2lsOTAyeF9yZW1vdmUoc3RydWN0IGkyY19jbGllbnQgKmNsaWVu dCkKPiArCj4gK3sKPiArCXN0cnVjdCBzaWw5MDJ4ICpzaWw5MDJ4ID0gaTJjX2dldF9jbGllbnRk YXRhKGNsaWVudCk7Cj4gKwo+ICsJZHJtX2JyaWRnZV9yZW1vdmUoJnNpbDkwMngtPmJyaWRnZSk7 Cj4gKwo+ICsJcmV0dXJuIDA7Cj4gK30KPiArCj4gKyNpZmRlZiBDT05GSUdfT0YKPiArc3RhdGlj IGNvbnN0IHN0cnVjdCBvZl9kZXZpY2VfaWQgc2lsOTAyeF9kdF9pZHNbXSA9IHsKPiArCXsgLmNv bXBhdGlibGUgPSAic2lsLHNpbDkwMjIiLCB9LAo+ICsJeyB9Cj4gK307Cj4gK01PRFVMRV9ERVZJ Q0VfVEFCTEUob2YsIHNpbDkwMnhfZHRfaWRzKTsKPiArI2VuZGlmCj4gKwo+ICtzdGF0aWMgY29u c3Qgc3RydWN0IGkyY19kZXZpY2VfaWQgc2lsOTAyeF9pMmNfaWRzW10gPSB7Cj4gKwl7ICJzaWw5 MDIyIiwgMCB9LAo+ICsJeyB9LAo+ICt9Owo+ICtNT0RVTEVfREVWSUNFX1RBQkxFKGkyYywgc2ls OTAyeF9pMmNfaWRzKTsKPiArCj4gK3N0YXRpYyBzdHJ1Y3QgaTJjX2RyaXZlciBzaWw5MDJ4X2Ry aXZlciA9IHsKPiArCS5wcm9iZSA9IHNpbDkwMnhfcHJvYmUsCj4gKwkucmVtb3ZlID0gc2lsOTAy eF9yZW1vdmUsCj4gKwkuZHJpdmVyID0gewo+ICsJCS5uYW1lID0gInNpbDkwMngiLAo+ICsJCS5v Zl9tYXRjaF90YWJsZSA9IG9mX21hdGNoX3B0cihzaWw5MDJ4X2R0X2lkcyksCj4gKwl9LAo+ICsJ LmlkX3RhYmxlID0gc2lsOTAyeF9pMmNfaWRzLAo+ICt9Owo+ICttb2R1bGVfaTJjX2RyaXZlcihz aWw5MDJ4X2RyaXZlcik7Cj4gKwo+ICtNT0RVTEVfQVVUSE9SKCJCb3JpcyBCcmV6aWxsb24gPGJv cmlzLmJyZXppbGxvbkBmcmVlLWVsZWN0cm9ucy5jb20+Iik7Cj4gK01PRFVMRV9ERVNDUklQVElP TigiU0lMOTAyeCBSR0IgLT4gSERNSSBicmlkZ2VzIik7Cj4gK01PRFVMRV9MSUNFTlNFKCJHUEwi KTsKPgoKLS0gClRoZSBRdWFsY29tbSBJbm5vdmF0aW9uIENlbnRlciwgSW5jLiBpcyBhIG1lbWJl ciBvZiB0aGUgQ29kZSBBdXJvcmEgCkZvcnVtLCBob3N0ZWQgYnkgVGhlIExpbnV4IEZvdW5kYXRp b24KX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KZHJpLWRl dmVsIG1haWxpbmcgbGlzdApkcmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHA6Ly9s aXN0cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9kcmktZGV2ZWwK From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752710AbcAGFnC (ORCPT ); Thu, 7 Jan 2016 00:43:02 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:39823 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750747AbcAGFm5 (ORCPT ); Thu, 7 Jan 2016 00:42:57 -0500 Subject: Re: [PATCH v2 1/2] drm: bridge: sil902x To: Boris Brezillon , David Airlie , Daniel Vetter , dri-devel@lists.freedesktop.org References: <1452079551-30914-1-git-send-email-boris.brezillon@free-electrons.com> <1452083126-18211-1-git-send-email-boris.brezillon@free-electrons.com> Cc: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , devicetree@vger.kernel.org, Nicolas Ferre , Jean-Christophe Plagniol-Villard , Alexandre Belloni , linux-kernel@vger.kernel.org From: Archit Taneja Message-ID: <568DFAD7.6030003@codeaurora.org> Date: Thu, 7 Jan 2016 11:12:47 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.2.0 MIME-Version: 1.0 In-Reply-To: <1452083126-18211-1-git-send-email-boris.brezillon@free-electrons.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 01/06/2016 05:55 PM, Boris Brezillon wrote: > Add basic support for the sil902x RGB -> HDMI bridge. > This driver does not support audio output yet. > > Signed-off-by: Boris Brezillon > --- > Hello, > > This patch is only adding basic support for the sil9022 chip. > As stated in the commit log, there's no audio support, but the > driver also hardcodes a lot of things (like the RGB input format to > use). > There are two reasons for this: > 1/ the DRM framework does not allow for advanced link description > between an encoder and a bridge (that's for the RGB format > limitation). Any idea how this should be described? The adv7511 driver uses a DT param "input_colorspace" to chose between RGB or YUV. I don't think DT is the best idea, but I don't know of a better way either. The connector's display_info.color_formats field gives us some info about the color formats supported by the monitor, but I guess that isn't sufficient data to know what format the encoder is pushing out. We get around this problem in case the case of DSI encoders by using the mipi_dsi_device api, where a DSI based bridge or panel can pass color format/lane info to the DSI host (i.e, encoder) by using mipi_dsi_attach(). > > 2/ I don't have the datasheet of this HDMI encoder, and all logic > has been extracted from those two drivers [1][2], which means > I may miss some important things in my encoder setup. > > Another thing I find weird in the drm_bridge interface is the fact > that we have a ->attach() method, but no ->detach(), which can be > a problem if we allow drm bridges and KMS drivers to be compiled as > modules. Any reason for that? I guess the drm_bridge_add/remove ops make can ensure that the bridge driver itself can be compiled as a module. However, you're right that we would need a bridge detach op that the kms driver should call before it is removed (to unregister the connector we created). Someone would still need to make sure about the order in which the modules are removed. If the bridge driver is removed first, then it would really mess up the kms driver using the bridge. Would the kms driver using this chip really have an encoder? Since the chip takes in RGB input, I'm assuming that the encoder in the kms driver would more or less be nop funcs, giving their way to bridge ops. In such cases, I think the bridge still doesn't fit in so well. The best fit here is how the current tda998x driver is modeled. It adds itself as a component that creates both an encoder and connector, which the kms driver can use directly. This approach, of course, prevents us using tda998x in kms drivers that don't accept any encoders that it didn't create itself. Thanks, Archit > > That's all for the questions part :-). > > Best Regards, > > Boris > > Changes in v2: > - fix errors reported by kbuild test robot > > --- > drivers/gpu/drm/bridge/Kconfig | 8 + > drivers/gpu/drm/bridge/Makefile | 1 + > drivers/gpu/drm/bridge/sil902x.c | 491 +++++++++++++++++++++++++++++++++++++++ > 3 files changed, 500 insertions(+) > create mode 100644 drivers/gpu/drm/bridge/sil902x.c > > diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig > index 27e2022..9701fd2 100644 > --- a/drivers/gpu/drm/bridge/Kconfig > +++ b/drivers/gpu/drm/bridge/Kconfig > @@ -40,4 +40,12 @@ config DRM_PARADE_PS8622 > ---help--- > Parade eDP-LVDS bridge chip driver. > > +config DRM_SIL902X > + tristate "Silicon Image sil902x RGB/HDMI bridge" > + depends on OF > + select DRM_KMS_HELPER > + select REGMAP_I2C > + ---help--- > + Silicon Image sil902x bridge chip driver. > + > endmenu > diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile > index f13c33d..a689aad 100644 > --- a/drivers/gpu/drm/bridge/Makefile > +++ b/drivers/gpu/drm/bridge/Makefile > @@ -4,3 +4,4 @@ obj-$(CONFIG_DRM_DW_HDMI) += dw-hdmi.o > obj-$(CONFIG_DRM_DW_HDMI_AHB_AUDIO) += dw-hdmi-ahb-audio.o > obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o > obj-$(CONFIG_DRM_PARADE_PS8622) += parade-ps8622.o > +obj-$(CONFIG_DRM_SIL902X) += sil902x.o > diff --git a/drivers/gpu/drm/bridge/sil902x.c b/drivers/gpu/drm/bridge/sil902x.c > new file mode 100644 > index 0000000..2657031 > --- /dev/null > +++ b/drivers/gpu/drm/bridge/sil902x.c > @@ -0,0 +1,491 @@ > +/* > + * Copyright (C) 2014 Atmel > + * Bo Shen > + * > + * Authors: Bo Shen > + * Boris Brezillon > + * Wu, Songjun > + * > + * > + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. All Rights Reserved. > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License as published by > + * the Free Software Foundation; either version 2 of the License, or > + * (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#include > +#include > +#include > +#include > +#include > +#include > + > +#define SIL902X_TPI_VIDEO_DATA 0x0 > + > +#define SIL902X_TPI_PIXEL_REPETITION 0x8 > +#define SIL902X_TPI_AVI_PIXEL_REP_BUS_24BIT BIT(5) > +#define SIL902X_TPI_AVI_PIXEL_REP_RISING_EDGE BIT(4) > +#define SIL902X_TPI_AVI_PIXEL_REP_4X 3 > +#define SIL902X_TPI_AVI_PIXEL_REP_2X 1 > +#define SIL902X_TPI_AVI_PIXEL_REP_NONE 0 > +#define SIL902X_TPI_CLK_RATIO_HALF (0 << 6) > +#define SIL902X_TPI_CLK_RATIO_1X (1 << 6) > +#define SIL902X_TPI_CLK_RATIO_2X (2 << 6) > +#define SIL902X_TPI_CLK_RATIO_4X (3 << 6) > + > +#define SIL902X_TPI_AVI_IN_FORMAT 0x9 > +#define SIL902X_TPI_AVI_INPUT_BITMODE_12BIT BIT(7) > +#define SIL902X_TPI_AVI_INPUT_DITHER BIT(6) > +#define SIL902X_TPI_AVI_INPUT_RANGE_LIMITED (2 << 2) > +#define SIL902X_TPI_AVI_INPUT_RANGE_FULL (1 << 2) > +#define SIL902X_TPI_AVI_INPUT_RANGE_AUTO (0 << 2) > +#define SIL902X_TPI_AVI_INPUT_COLORSPACE_BLACK (3 << 0) > +#define SIL902X_TPI_AVI_INPUT_COLORSPACE_YUV422 (2 << 0) > +#define SIL902X_TPI_AVI_INPUT_COLORSPACE_YUV444 (1 << 0) > +#define SIL902X_TPI_AVI_INPUT_COLORSPACE_RGB (0 << 0) > + > +#define SIL902X_TPI_AVI_INFOFRAME 0x0c > + > +#define SIL902X_SYS_CTRL_DATA 0x1a > +#define SIL902X_SYS_CTRL_PWR_DWN BIT(4) > +#define SIL902X_SYS_CTRL_AV_MUTE BIT(3) > +#define SIL902X_SYS_CTRL_DDC_BUS_REQ BIT(2) > +#define SIL902X_SYS_CTRL_DDC_BUS_GRTD BIT(1) > +#define SIL902X_SYS_CTRL_OUTPUT_MODE BIT(0) > +#define SIL902X_SYS_CTRL_OUTPUT_HDMI 1 > +#define SIL902X_SYS_CTRL_OUTPUT_DVI 0 > + > +#define SIL902X_REG_CHIPID(n) (0x1b + (n)) > + > +#define SIL902X_PWR_STATE_CTRL 0x1e > +#define SIL902X_AVI_POWER_STATE_MSK GENMASK(1, 0) > +#define SIL902X_AVI_POWER_STATE_D(l) ((l) & SIL902X_AVI_POWER_STATE_MSK) > + > +#define SI902X_INT_ENABLE 0x3c > +#define SI902X_INT_STATUS 0x3d > +#define SI902X_HOTPLUG_EVENT BIT(0) > +#define SI902X_PLUGGED_STATUS BIT(2) > + > +#define SIL902X_REG_TPI_RQB 0xc7 > + > +struct sil902x { > + struct i2c_client *i2c; > + struct regmap *regmap; > + struct drm_bridge bridge; > + struct drm_connector connector; > + struct gpio_desc *reset_gpio; > + struct work_struct hotplug_work; > +}; > + > +static inline struct sil902x *bridge_to_sil902x(struct drm_bridge *bridge) > +{ > + return container_of(bridge, struct sil902x, bridge); > +} > + > +static inline struct sil902x *connector_to_sil902x(struct drm_connector *con) > +{ > + return container_of(con, struct sil902x, connector); > +} > + > +static void sil902x_reset(struct sil902x *sil902x) > +{ > + gpiod_set_value(sil902x->reset_gpio, 1); > + > + msleep(100); > + > + gpiod_set_value(sil902x->reset_gpio, 0); > +} > + > +static void sil902x_connector_destroy(struct drm_connector *connector) > +{ > + drm_connector_unregister(connector); > + drm_connector_cleanup(connector); > +} > + > +static enum drm_connector_status > +sil902x_connector_detect(struct drm_connector *connector, bool force) > +{ > + struct sil902x *sil902x = connector_to_sil902x(connector); > + unsigned int status; > + > + regmap_read(sil902x->regmap, SI902X_INT_STATUS, &status); > + > + return (status & SI902X_PLUGGED_STATUS) ? > + connector_status_connected : connector_status_disconnected; > +} > + > +static const struct drm_connector_funcs sil902x_atomic_connector_funcs = { > + .dpms = drm_atomic_helper_connector_dpms, > + .detect = sil902x_connector_detect, > + .fill_modes = drm_helper_probe_single_connector_modes, > + .destroy = sil902x_connector_destroy, > + .reset = drm_atomic_helper_connector_reset, > + .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, > + .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, > +}; > + > +static const struct drm_connector_funcs sil902x_connector_funcs = { > + .dpms = drm_atomic_helper_connector_dpms, > + .detect = sil902x_connector_detect, > + .fill_modes = drm_helper_probe_single_connector_modes, > + .destroy = sil902x_connector_destroy, > +}; > + > +static int sil902x_get_modes(struct drm_connector *connector) > +{ > + struct sil902x *sil902x = connector_to_sil902x(connector); > + struct regmap *regmap = sil902x->regmap; > + u32 bus_format = MEDIA_BUS_FMT_RGB888_1X24; > + unsigned int status; > + struct edid *edid; > + int num = 0; > + int ret; > + int i; > + > + ret = regmap_update_bits(regmap, SIL902X_PWR_STATE_CTRL, > + SIL902X_AVI_POWER_STATE_MSK, > + SIL902X_AVI_POWER_STATE_D(2)); > + if (ret) > + return ret; > + > + ret = regmap_write(regmap, SIL902X_SYS_CTRL_DATA, > + SIL902X_SYS_CTRL_OUTPUT_HDMI | > + SIL902X_SYS_CTRL_PWR_DWN); > + if (ret) > + return ret; > + > + ret = regmap_update_bits(regmap, SIL902X_SYS_CTRL_DATA, > + SIL902X_SYS_CTRL_DDC_BUS_REQ, > + SIL902X_SYS_CTRL_DDC_BUS_REQ); > + if (ret) > + return ret; > + > + i = 0; > + do { > + ret = regmap_read(regmap, SIL902X_SYS_CTRL_DATA, &status); > + if (ret) > + return ret; > + i++; > + } while (!(status & SIL902X_SYS_CTRL_DDC_BUS_GRTD)); > + > + ret = regmap_write(regmap, SIL902X_SYS_CTRL_DATA, status); > + if (ret) > + return ret; > + > + edid = drm_get_edid(connector, sil902x->i2c->adapter); > + drm_mode_connector_update_edid_property(connector, edid); > + if (edid) { > + num += drm_add_edid_modes(connector, edid); > + kfree(edid); > + } > + > + ret = drm_display_info_set_bus_formats(&connector->display_info, > + &bus_format, 1); > + if (ret) > + return ret; > + > + regmap_read(regmap, SIL902X_SYS_CTRL_DATA, &status); > + if (ret) > + return ret; > + > + ret = regmap_update_bits(regmap, SIL902X_SYS_CTRL_DATA, > + SIL902X_SYS_CTRL_DDC_BUS_REQ | > + SIL902X_SYS_CTRL_DDC_BUS_GRTD, 0); > + if (ret) > + return ret; > + > + i = 0; > + do { > + ret = regmap_read(regmap, SIL902X_SYS_CTRL_DATA, &status); > + if (ret) > + return ret; > + i++; > + } while (status & (SIL902X_SYS_CTRL_DDC_BUS_REQ | > + SIL902X_SYS_CTRL_DDC_BUS_GRTD)); > + > + return num; > +} > + > +static enum drm_mode_status sil902x_mode_valid(struct drm_connector *connector, > + struct drm_display_mode *mode) > +{ > + /* TODO: check mode */ > + > + return MODE_OK; > +} > + > +static struct drm_encoder *sil902x_best_encoder(struct drm_connector *connector) > +{ > + struct sil902x *sil902x = connector_to_sil902x(connector); > + > + return sil902x->bridge.encoder; > +} > + > +static const struct drm_connector_helper_funcs sil902x_connector_helper_funcs = { > + .get_modes = sil902x_get_modes, > + .mode_valid = sil902x_mode_valid, > + .best_encoder = sil902x_best_encoder, > +}; > + > +static void sil902x_bridge_disable(struct drm_bridge *bridge) > +{ > + struct sil902x *sil902x = bridge_to_sil902x(bridge); > + > + regmap_update_bits(sil902x->regmap, SIL902X_SYS_CTRL_DATA, > + SIL902X_SYS_CTRL_PWR_DWN, > + SIL902X_SYS_CTRL_PWR_DWN); > +} > + > +static void sil902x_bridge_enable(struct drm_bridge *bridge) > +{ > + struct sil902x *sil902x = bridge_to_sil902x(bridge); > + > + regmap_update_bits(sil902x->regmap, SIL902X_PWR_STATE_CTRL, > + SIL902X_AVI_POWER_STATE_MSK, > + SIL902X_AVI_POWER_STATE_D(0)); > + regmap_update_bits(sil902x->regmap, SIL902X_SYS_CTRL_DATA, > + SIL902X_SYS_CTRL_PWR_DWN, 0); > +} > + > +static void sil902x_bridge_mode_set(struct drm_bridge *bridge, > + struct drm_display_mode *mode, > + struct drm_display_mode *adj) > +{ > + u8 buf[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AVI_INFOFRAME_SIZE]; > + struct sil902x *sil902x = bridge_to_sil902x(bridge); > + struct regmap *regmap = sil902x->regmap; > + struct hdmi_avi_infoframe frame; > + int ret; > + > + buf[0] = adj->clock; > + buf[1] = adj->clock >> 8; > + buf[2] = adj->vrefresh; > + buf[3] = 0x00; > + buf[4] = adj->hdisplay; > + buf[5] = adj->hdisplay >> 8; > + buf[6] = adj->vdisplay; > + buf[7] = adj->vdisplay >> 8; > + buf[8] = SIL902X_TPI_CLK_RATIO_1X | SIL902X_TPI_AVI_PIXEL_REP_NONE | > + SIL902X_TPI_AVI_PIXEL_REP_BUS_24BIT; > + buf[9] = SIL902X_TPI_AVI_INPUT_RANGE_AUTO | > + SIL902X_TPI_AVI_INPUT_COLORSPACE_RGB; > + > + ret = regmap_bulk_write(regmap, SIL902X_TPI_VIDEO_DATA, buf, 10); > + if (ret) > + return; > + > + ret = drm_hdmi_avi_infoframe_from_display_mode(&frame, adj); > + if (ret < 0) { > + DRM_ERROR("couldn't fill AVI infoframe\n"); > + return; > + } > + > + ret = hdmi_avi_infoframe_pack(&frame, buf, sizeof(buf)); > + if (ret < 0) { > + DRM_ERROR("failed to pack AVI infoframe: %zd\n", ret); > + return; > + } > + > + /* Do not send the infoframe header, but keep the CRC field. */ > + regmap_bulk_write(regmap, SIL902X_TPI_AVI_INFOFRAME, > + buf + HDMI_INFOFRAME_HEADER_SIZE - 1, > + HDMI_AVI_INFOFRAME_SIZE + 1); > +} > + > +static int sil902x_bridge_attach(struct drm_bridge *bridge) > +{ > + const struct drm_connector_funcs *funcs = &sil902x_connector_funcs; > + struct sil902x *sil902x = bridge_to_sil902x(bridge); > + struct drm_device *drm = bridge->dev; > + int ret; > + > + drm_connector_helper_add(&sil902x->connector, > + &sil902x_connector_helper_funcs); > + > + if (drm_core_check_feature(drm, DRIVER_ATOMIC)) > + funcs = &sil902x_atomic_connector_funcs; > + > + ret = drm_connector_init(drm, &sil902x->connector, funcs, > + DRM_MODE_CONNECTOR_HDMIA); > + if (ret) > + return ret; > + > + if (sil902x->i2c->irq > 0) > + sil902x->connector.polled = DRM_CONNECTOR_POLL_HPD; > + else > + sil902x->connector.polled = DRM_CONNECTOR_POLL_CONNECT; > + > + drm_mode_connector_attach_encoder(&sil902x->connector, bridge->encoder); > + > + return 0; > +} > + > +static void sil902x_bridge_nop(struct drm_bridge *bridge) > +{ > +} > + > +static const struct drm_bridge_funcs sil902x_bridge_funcs = { > + .attach = sil902x_bridge_attach, > + .mode_set = sil902x_bridge_mode_set, > + .disable = sil902x_bridge_disable, > + .post_disable = sil902x_bridge_nop, > + .pre_enable = sil902x_bridge_nop, > + .enable = sil902x_bridge_enable, > +}; > + > +static const struct regmap_range sil902x_volatile_ranges[] = { > + { .range_min = 0, .range_max = 0xff }, > +}; > + > +static const struct regmap_access_table sil902x_volatile_table = { > + .yes_ranges = sil902x_volatile_ranges, > + .n_yes_ranges = ARRAY_SIZE(sil902x_volatile_ranges), > +}; > + > +static const struct regmap_config sil902x_regmap_config = { > + .reg_bits = 8, > + .val_bits = 8, > + .volatile_table = &sil902x_volatile_table, > + .cache_type = REGCACHE_NONE, > +}; > + > +static irqreturn_t sil902x_interrupt(int irq, void *data) > +{ > + struct sil902x *sil902x = data; > + unsigned int status = 0; > + > + regmap_read(sil902x->regmap, SI902X_INT_STATUS, &status); > + regmap_write(sil902x->regmap, SI902X_INT_STATUS, status); > + > + if ((status & SI902X_HOTPLUG_EVENT) && sil902x->bridge.dev) > + drm_helper_hpd_irq_event(sil902x->bridge.dev); > + > + return IRQ_HANDLED; > +} > + > +static int sil902x_probe(struct i2c_client *client, > + const struct i2c_device_id *id) > +{ > + struct device *dev = &client->dev; > + unsigned int status = 0; > + struct sil902x *sil902x; > + u8 chipid[4]; > + int ret; > + > + sil902x = devm_kzalloc(dev, sizeof(*sil902x), GFP_KERNEL); > + if (!sil902x) > + return -ENOMEM; > + > + sil902x->i2c = client; > + sil902x->regmap = devm_regmap_init_i2c(client, &sil902x_regmap_config); > + if (IS_ERR(sil902x->regmap)) > + return PTR_ERR(sil902x->regmap); > + > + sil902x->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW); > + if (IS_ERR(sil902x->reset_gpio)) { > + dev_err(dev, "Failed to retrieve/request reset gpio: %ld\n", > + PTR_ERR(sil902x->reset_gpio)); > + return PTR_ERR(sil902x->reset_gpio); > + } > + > + sil902x_reset(sil902x); > + > + ret = regmap_write(sil902x->regmap, SIL902X_REG_TPI_RQB, 0x0); > + if (ret) > + return ret; > + > + ret = regmap_bulk_read(sil902x->regmap, SIL902X_REG_CHIPID(0), > + &chipid, 4); > + if (ret) { > + dev_err(dev, "regmap_read failed %d\n", ret); > + return ret; > + } > + > + if (chipid[0] != 0xb0) { > + dev_err(dev, "Invalid chipid: %02x (expecting 0xb0)\n", > + chipid[0]); > + return -EINVAL; > + } > + > + /* Clear all pending interrupts */ > + regmap_read(sil902x->regmap, SI902X_INT_STATUS, &status); > + regmap_write(sil902x->regmap, SI902X_INT_STATUS, status); > + > + if (client->irq > 0) { > + regmap_write(sil902x->regmap, SI902X_INT_ENABLE, > + SI902X_HOTPLUG_EVENT); > + > + ret = devm_request_threaded_irq(dev, client->irq, NULL, > + sil902x_interrupt, > + IRQF_ONESHOT, dev_name(dev), > + sil902x); > + if (ret) > + return ret; > + } > + > + sil902x->bridge.funcs = &sil902x_bridge_funcs; > + sil902x->bridge.of_node = dev->of_node; > + ret = drm_bridge_add(&sil902x->bridge); > + if (ret) { > + dev_err(dev, "Failed to add drm_bridge\n"); > + return ret; > + } > + > + i2c_set_clientdata(client, sil902x); > + > + return 0; > +} > + > +static int sil902x_remove(struct i2c_client *client) > + > +{ > + struct sil902x *sil902x = i2c_get_clientdata(client); > + > + drm_bridge_remove(&sil902x->bridge); > + > + return 0; > +} > + > +#ifdef CONFIG_OF > +static const struct of_device_id sil902x_dt_ids[] = { > + { .compatible = "sil,sil9022", }, > + { } > +}; > +MODULE_DEVICE_TABLE(of, sil902x_dt_ids); > +#endif > + > +static const struct i2c_device_id sil902x_i2c_ids[] = { > + { "sil9022", 0 }, > + { }, > +}; > +MODULE_DEVICE_TABLE(i2c, sil902x_i2c_ids); > + > +static struct i2c_driver sil902x_driver = { > + .probe = sil902x_probe, > + .remove = sil902x_remove, > + .driver = { > + .name = "sil902x", > + .of_match_table = of_match_ptr(sil902x_dt_ids), > + }, > + .id_table = sil902x_i2c_ids, > +}; > +module_i2c_driver(sil902x_driver); > + > +MODULE_AUTHOR("Boris Brezillon "); > +MODULE_DESCRIPTION("SIL902x RGB -> HDMI bridges"); > +MODULE_LICENSE("GPL"); > -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by The Linux Foundation