From mboxrd@z Thu Jan 1 00:00:00 1970 From: Yakir Yang Subject: Re: [RFC PATCH v2 3/4] drm: rockchip: hdmi: add RK3229 HDMI support Date: Fri, 8 Jan 2016 17:13:52 +0800 Message-ID: <568F7DD0.7090707@rock-chips.com> References: <1452156811-18150-1-git-send-email-ykk@rock-chips.com> <1452157373-18783-1-git-send-email-ykk@rock-chips.com> <1452161052.4776.7.camel@pengutronix.de> <568E3AD0.1020904@rock-chips.com> <1452185424.4776.36.camel@pengutronix.de> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; Format="flowed" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1452185424.4776.36.camel@pengutronix.de> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Philipp Zabel Cc: devicetree@vger.kernel.org, Kumar Gala , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, Rob Herring , Andy Yan , Russell King , Zheng Yang , linux-arm-kernel@lists.infradead.org List-Id: linux-rockchip.vger.kernel.org SGkgUGhpbGlwcCwKCk9uIDAxLzA4LzIwMTYgMTI6NTAgQU0sIFBoaWxpcHAgWmFiZWwgd3JvdGU6 Cj4gSGkgWWFraXIsCj4KPiBBbSBEb25uZXJzdGFnLCBkZW4gMDcuMDEuMjAxNiwgMTg6MTUgKzA4 MDAgc2NocmllYiBZYWtpciBZYW5nOgo+PiBIaSBQaGlsaXBwLAo+Pgo+PiBUaGFua3MgZm9yIHlv dXIgZmFzdCByZXNwb25kIDopCj4+Cj4+IE9uIDAxLzA3LzIwMTYgMDY6MDQgUE0sIFBoaWxpcHAg WmFiZWwgd3JvdGU6Cj4+PiBBbSBEb25uZXJzdGFnLCBkZW4gMDcuMDEuMjAxNiwgMTc6MDIgKzA4 MDAgc2NocmllYiBZYWtpciBZYW5nOgo+Pj4+IFJLMzIyOSBpbnRlZ3JhdGUgYW4gRGVzaWduZWRX YXJlIEhETUkyLjAgY29udHJvbGxlciBhbmQgYW4gSU5OTyBIRE1JMi4wIHBoeSwKPj4+PiB0aGUg bWF4IG91dHB1dCByZXNvbHV0aW9uIGlzIDRLLgo+Pj4+Cj4+Pj4gU2lnbmVkLW9mZi1ieTogWWFr aXIgWWFuZyA8eWtrQHJvY2stY2hpcHMuY29tPgo+Pj4gSXQgc291bmRzIGxpa2UgdGhlIElOTk8g SERNSTIuMCBwaHkgaXMgbm90IG5lY2Vzc2FyaWx5IHNwZWNpZmljIHRvCj4+PiBSSzMyMjkgYnV0 IG1pZ2h0IGFsc28gYXBwZWFyIGluIG90aGVyIFNvQ3M/IElmIHNvLCBJIHRoaW5rIHRoaXMgc2hv dWxkCj4+PiBiZSBpbXBsZW1lbnRlZCBpbiBhIHNlcGFyYXRlIHBoeSBkcml2ZXIgYW5kIGJlIHVz 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+0800 Subject: [RFC PATCH v2 3/4] drm: rockchip: hdmi: add RK3229 HDMI support In-Reply-To: <1452185424.4776.36.camel@pengutronix.de> References: <1452156811-18150-1-git-send-email-ykk@rock-chips.com> <1452157373-18783-1-git-send-email-ykk@rock-chips.com> <1452161052.4776.7.camel@pengutronix.de> <568E3AD0.1020904@rock-chips.com> <1452185424.4776.36.camel@pengutronix.de> Message-ID: <568F7DD0.7090707@rock-chips.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi Philipp, On 01/08/2016 12:50 AM, Philipp Zabel wrote: > Hi Yakir, > > Am Donnerstag, den 07.01.2016, 18:15 +0800 schrieb Yakir Yang: >> Hi Philipp, >> >> Thanks for your fast respond :) >> >> On 01/07/2016 06:04 PM, Philipp Zabel wrote: >>> Am Donnerstag, den 07.01.2016, 17:02 +0800 schrieb Yakir Yang: >>>> RK3229 integrate an DesignedWare HDMI2.0 controller and an INNO HDMI2.0 phy, >>>> the max output resolution is 4K. >>>> >>>> Signed-off-by: Yakir Yang >>> It sounds like the INNO HDMI2.0 phy is not necessarily specific to >>> RK3229 but might also appear in other SoCs? If so, I think this should >>> be implemented in a separate phy driver and be used by dw_hdmi-rockchip. >> Do you mean I should create a new phy driver that place in "driver/phy" >> directly ? > Possibly, yes. The exynos video phys are already there. I have kept the > mediatek dsi/hdmi phys together with the DRM driver, but I suppose I > could move them there, too. > >> I have think about this idea, and it would make things much clean. But >> INNO PHY >> driver need the target pixel clock in drm_display_mode, I didn't find a >> good way >> to pass this variable to separate phy driver. Do you have some idea ? > We'd need to extend the PHY API for this. For the mediatek phys we have > side-stepped the issue by wiring up the PLL output to the common clock > framework. Wow, I have look at your "drm/mediatek: Add HDMI support" patch, it's great to registers a common clock framework. > I expect besides the pixel clock frequency, it might also be necessary > to inform the PHY about cycles per pixel for deep color modes. INNO PHY didn't need the color depth directly, driver could get the input pixel clock rate, and then hdmi core driver could set TMDS rate though common clock framework. Anyway it's great material, I would update the new version out. Thanks a lot - Yakir > regards > Philipp > > > > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754517AbcAHJO5 (ORCPT ); Fri, 8 Jan 2016 04:14:57 -0500 Received: from lucky1.263xmail.com ([211.157.147.132]:40844 "EHLO lucky1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751401AbcAHJOA (ORCPT ); Fri, 8 Jan 2016 04:14:00 -0500 X-263anti-spam: KSV:0; X-MAIL-GRAY: 1 X-MAIL-DELIVERY: 0 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 X-RL-SENDER: ykk@rock-chips.com X-FST-TO: linux-arm-kernel@lists.infradead.org X-SENDER-IP: 103.29.142.67 X-LOGIN-NAME: ykk@rock-chips.com X-UNIQUE-TAG: <6bc0cb08a59ef9ac51415123fb6d6d42> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Subject: Re: [RFC PATCH v2 3/4] drm: rockchip: hdmi: add RK3229 HDMI support To: Philipp Zabel References: <1452156811-18150-1-git-send-email-ykk@rock-chips.com> <1452157373-18783-1-git-send-email-ykk@rock-chips.com> <1452161052.4776.7.camel@pengutronix.de> <568E3AD0.1020904@rock-chips.com> <1452185424.4776.36.camel@pengutronix.de> Cc: Mark Yao , Heiko Stuebner , Russell King , Andy Yan , David Airlie , Rob Herring , Kumar Gala , Zheng Yang , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org From: Yakir Yang Message-ID: <568F7DD0.7090707@rock-chips.com> Date: Fri, 8 Jan 2016 17:13:52 +0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.3.0 MIME-Version: 1.0 In-Reply-To: <1452185424.4776.36.camel@pengutronix.de> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Philipp, On 01/08/2016 12:50 AM, Philipp Zabel wrote: > Hi Yakir, > > Am Donnerstag, den 07.01.2016, 18:15 +0800 schrieb Yakir Yang: >> Hi Philipp, >> >> Thanks for your fast respond :) >> >> On 01/07/2016 06:04 PM, Philipp Zabel wrote: >>> Am Donnerstag, den 07.01.2016, 17:02 +0800 schrieb Yakir Yang: >>>> RK3229 integrate an DesignedWare HDMI2.0 controller and an INNO HDMI2.0 phy, >>>> the max output resolution is 4K. >>>> >>>> Signed-off-by: Yakir Yang >>> It sounds like the INNO HDMI2.0 phy is not necessarily specific to >>> RK3229 but might also appear in other SoCs? If so, I think this should >>> be implemented in a separate phy driver and be used by dw_hdmi-rockchip. >> Do you mean I should create a new phy driver that place in "driver/phy" >> directly ? > Possibly, yes. The exynos video phys are already there. I have kept the > mediatek dsi/hdmi phys together with the DRM driver, but I suppose I > could move them there, too. > >> I have think about this idea, and it would make things much clean. But >> INNO PHY >> driver need the target pixel clock in drm_display_mode, I didn't find a >> good way >> to pass this variable to separate phy driver. Do you have some idea ? > We'd need to extend the PHY API for this. For the mediatek phys we have > side-stepped the issue by wiring up the PLL output to the common clock > framework. Wow, I have look at your "drm/mediatek: Add HDMI support" patch, it's great to registers a common clock framework. > I expect besides the pixel clock frequency, it might also be necessary > to inform the PHY about cycles per pixel for deep color modes. INNO PHY didn't need the color depth directly, driver could get the input pixel clock rate, and then hdmi core driver could set TMDS rate though common clock framework. Anyway it's great material, I would update the new version out. Thanks a lot - Yakir > regards > Philipp > > > >