From: Jos Huisken <jos.huisken@gmail.com>
To: linux-kernel@vger.kernel.org
Subject: Re: [PATCH v14 0/7] fpga area and fpga bridge framework
Date: Mon, 11 Jan 2016 10:54:06 +0100 [thread overview]
Message-ID: <56937BBE.6090904@gmail.com> (raw)
In-Reply-To: 1449790629-5517-1-git-send-email-atull () opensource ! altera ! com
On Thu, Dec 10, 2015 at 05:37:04PM -0600, atull@xxxxxxxxxxxxxxxxxxxxx wrote:
>
> For v14 I'm dropping the concept of "simple-fpga-bus" for "fpga-area"
> with reworked bindings.
Works great (using 4.4rc5)!!
With:
- Pantelis' overlay patches and dtc,
- Walter Goossens' sopcinfo with minor overlay patch
- additional board_info.xml
- and some python scripting using pyfdt
Its -almost- possible to automatically generate a bitfile with
appropriate overlay devicetree blob.
I only have an issue left w.r.t. phandles, I guess.
Using it now on de0-nano and veek kit.
next reply other threads:[~2016-01-11 9:54 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-11 9:54 Jos Huisken [this message]
-- strict thread matches above, loose matches on Subject: below --
2015-12-10 23:37 [PATCH v14 0/7] fpga area and fpga bridge framework atull
2015-12-10 23:37 ` atull
2015-12-14 17:16 ` Moritz Fischer
2015-12-15 1:56 ` Alan Tull
2015-12-15 18:15 ` Moritz Fischer
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