From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759164AbcAKKOQ (ORCPT ); Mon, 11 Jan 2016 05:14:16 -0500 Received: from hqemgate15.nvidia.com ([216.228.121.64]:16954 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758151AbcAKKOP (ORCPT ); Mon, 11 Jan 2016 05:14:15 -0500 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Mon, 11 Jan 2016 02:09:49 -0800 Subject: Re: [PATCH V2 1/2] irqchip/gic: Remove static irq_chip definition for eoimode1 To: Marc Zyngier References: <1450786176-2311-1-git-send-email-jonathanh@nvidia.com> CC: Thomas Gleixner , Jason Cooper , From: Jon Hunter Message-ID: <5693806F.7040100@nvidia.com> Date: Mon, 11 Jan 2016 10:14:07 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.4.0 MIME-Version: 1.0 In-Reply-To: <1450786176-2311-1-git-send-email-jonathanh@nvidia.com> X-Originating-IP: [10.21.132.159] X-ClientProxiedBy: UKMAIL101.nvidia.com (10.26.138.13) To UKMAIL101.nvidia.com (10.26.138.13) Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Mark, Any comment on these patches? Cheers Jon On 22/12/15 12:09, Jon Hunter wrote: > There are only 3 differences (not including the name) in the definitions > of the gic_chip and gic_eoimode1_chip structures. Instead of statically > defining the gic_eoimode1_chip structure, remove it and populate the > eoimode1 functions dynamically for the appropriate GIC irqchips. > > Signed-off-by: Jon Hunter > --- > drivers/irqchip/irq-gic.c | 26 +++++--------------------- > 1 file changed, 5 insertions(+), 21 deletions(-) > > diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c > index fcbe0b90870d..94ad60c424a7 100644 > --- a/drivers/irqchip/irq-gic.c > +++ b/drivers/irqchip/irq-gic.c > @@ -394,23 +394,6 @@ static struct irq_chip gic_chip = { > IRQCHIP_MASK_ON_SUSPEND, > }; > > -static struct irq_chip gic_eoimode1_chip = { > - .name = "GICv2", > - .irq_mask = gic_eoimode1_mask_irq, > - .irq_unmask = gic_unmask_irq, > - .irq_eoi = gic_eoimode1_eoi_irq, > - .irq_set_type = gic_set_type, > -#ifdef CONFIG_SMP > - .irq_set_affinity = gic_set_affinity, > -#endif > - .irq_get_irqchip_state = gic_irq_get_irqchip_state, > - .irq_set_irqchip_state = gic_irq_set_irqchip_state, > - .irq_set_vcpu_affinity = gic_irq_set_vcpu_affinity, > - .flags = IRQCHIP_SET_TYPE_MASKED | > - IRQCHIP_SKIP_SET_WAKE | > - IRQCHIP_MASK_ON_SUSPEND, > -}; > - > void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq) > { > BUG_ON(gic_nr >= CONFIG_ARM_GIC_MAX_NR); > @@ -1030,13 +1013,14 @@ static void __init __gic_init_bases(unsigned int gic_nr, int irq_start, > gic_check_cpu_features(); > > gic = &gic_data[gic_nr]; > + gic->chip = gic_chip; > + gic->chip.name = kasprintf(GFP_KERNEL, "GIC-%d", gic_nr); > > /* Initialize irq_chip */ > if (static_key_true(&supports_deactivate) && gic_nr == 0) { > - gic->chip = gic_eoimode1_chip; > - } else { > - gic->chip = gic_chip; > - gic->chip.name = kasprintf(GFP_KERNEL, "GIC-%d", gic_nr); > + gic->chip.irq_mask = gic_eoimode1_mask_irq; > + gic->chip.irq_eoi = gic_eoimode1_eoi_irq; > + gic->chip.irq_set_vcpu_affinity = gic_irq_set_vcpu_affinity; > } > > #ifdef CONFIG_GIC_NON_BANKED >