From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44354) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aIbOw-00086L-JO for qemu-devel@nongnu.org; Mon, 11 Jan 2016 07:16:47 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aIbOt-0008Nc-DI for qemu-devel@nongnu.org; Mon, 11 Jan 2016 07:16:46 -0500 Received: from mx1.redhat.com ([209.132.183.28]:52491) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aIbOt-0008NI-7G for qemu-devel@nongnu.org; Mon, 11 Jan 2016 07:16:43 -0500 References: <1452257883-19549-1-git-send-email-kraxel@redhat.com> <20160108184543.5a6d2554@nial.brq.redhat.com> <569000C2.7050809@redhat.com> <1452500780.8098.27.camel@redhat.com> From: Laszlo Ersek Message-ID: <56939D27.7020508@redhat.com> Date: Mon, 11 Jan 2016 13:16:39 +0100 MIME-Version: 1.0 In-Reply-To: <1452500780.8098.27.camel@redhat.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v2] pc: allow raising low memory via max-ram-below-4g option List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Gerd Hoffmann Cc: Eduardo Habkost , "Michael S. Tsirkin" , qemu-devel@nongnu.org, Paolo Bonzini , Igor Mammedov , Richard Henderson On 01/11/16 09:26, Gerd Hoffmann wrote: > On Fr, 2016-01-08 at 19:32 +0100, Laszlo Ersek wrote: >> On 01/08/16 18:45, Igor Mammedov wrote: >>> On Fri, 8 Jan 2016 13:58:03 +0100 >>> Gerd Hoffmann wrote: >>> >>>> This patch extends the functionality of the max-ram-below-4g option >>>> to also allow increasing lowmem. Use case: Give as much memory as >>>> possible to legacy non-PAE guests. >>>> >>>> While being at it also rework the lowmem calculation logic and add a >>>> longish comment describing how it works and what the compatibility >>>> constrains are. >>> CCing Laszlo as it might affect OVMF >> >> Thanks a lot for the CC, Igor! >> >> So I have to investigate this separately for i440fx and Q35. >> >> (1) For i440fx, OVMF determines the base of the 32-bit PCI hole like this: >> >> PciBase = (TopOfLowRam < BASE_2GB) ? BASE_2GB : TopOfLowRam; >> >> where TopOfLowRam is calculated from the CMOS registers 0x34 and 0x35. >> >> *If* QEMU is still sticking with the idea of git commit ddaaefb4dd, that >> is, the 32-bit PCI hole still starts immediately after the end of low >> RAM, then this change should be fine for i440fx. > > Good. > >> Gerd, can you confirm that this new logic for the lowmem/highmem split >> doesn't affect the above? >> >> In other words, as long as there is no "void" left between the top of >> low RAM and the base of the PCI hole, it doesn't matter where exactly >> the split is. > > Yes, the logic is the same as before. Anything above ram is pci i/o. > >> (2) For Q35, the OVMF code is different: > > The patch doesn't change q35 behavior. Thanks for confirming! Acked-by: Laszlo Ersek