From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mark yao Subject: Re: [PATCH] drm/rockchip: vop: fix mask when updating interrupts Date: Wed, 13 Jan 2016 16:12:08 +0800 Message-ID: <569606D8.8060309@rock-chips.com> References: <1452621918-32239-1-git-send-email-john@metanate.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; Format="flowed" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1452621918-32239-1-git-send-email-john@metanate.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: John Keeping Cc: linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org List-Id: linux-rockchip.vger.kernel.org T24gMjAxNuW5tDAx5pyIMTPml6UgMDI6MDUsIEpvaG4gS2VlcGluZyB3cm90ZToKPiBDb21taXQg ZGJiM2Q5NCAoZHJtL3JvY2tjaGlwOiB2b3A6IG1vdmUgaW50ZXJydXB0IHJlZ2lzdGVycyBpbnRv Cj4gdm9wX2RhdGEpIGludHJvZHVjZWQgbmV3IG1hY3JvcyBmb3IgdXBkYXRpbmcgdGhlIGludGVy cnVwdCBjb250cm9sCj4gcmVnaXN0ZXJzIGJ1dCB0aGVzZSBhbHdheXMgdXNlIHRoZSBtYXNrIGZy b20gdGhlIHJlZ2lzdGVyIGRlZmluaXRpb24KPiB3aXRob3V0IHJlZmluaW5nIGl0IGZvciB0aGUg cGFydGljdWxhciBiaXRzIHRoYXQgYXJlIGJlaW5nIGNoYW5nZWQuCj4KPiBUaGlzIG1lYW5zIHRo YXQgd2hlbmV2ZXIgd2UgZW5hYmxlL2Rpc2FibGUgYSBwYXJ0aWN1bGFyIGludGVycnVwdCB3ZSBl bmQKPiB1cCBkaXNhYmxpbmcgYWxsIG9mIHRoZSBvdGhlcnMgYXMgYSBzaWRlIGVmZmVjdC4KPgo+ IFNpZ25lZC1vZmYtYnk6IEpvaG4gS2VlcGluZyA8am9obkBtZXRhbmF0ZS5jb20+Cj4gLS0tCj4g ICBkcml2ZXJzL2dwdS9kcm0vcm9ja2NoaXAvcm9ja2NoaXBfZHJtX3ZvcC5jIHwgMTYgKysrKysr KysrLS0tLS0tLQo+ICAgMSBmaWxlIGNoYW5nZWQsIDkgaW5zZXJ0aW9ucygrKSwgNyBkZWxldGlv bnMoLSkKPgo+IGRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vcm9ja2NoaXAvcm9ja2NoaXBf ZHJtX3ZvcC5jIGIvZHJpdmVycy9ncHUvZHJtL3JvY2tjaGlwL3JvY2tjaGlwX2RybV92b3AuYwo+ IGluZGV4IDQ2YzJhOGQuLmZkMzcwNTQgMTAwNjQ0Cj4gLS0tIGEvZHJpdmVycy9ncHUvZHJtL3Jv Y2tjaGlwL3JvY2tjaGlwX2RybV92b3AuYwo+ICsrKyBiL2RyaXZlcnMvZ3B1L2RybS9yb2NrY2hp cC9yb2NrY2hpcF9kcm1fdm9wLmMKPiBAQCAtNDMsOCArNDMsOCBAQAo+ICAgCj4gICAjZGVmaW5l IFJFR19TRVQoeCwgYmFzZSwgcmVnLCB2LCBtb2RlKSBcCj4gICAJCV9fUkVHX1NFVF8jI21vZGUo eCwgYmFzZSArIHJlZy5vZmZzZXQsIHJlZy5tYXNrLCByZWcuc2hpZnQsIHYpCj4gLSNkZWZpbmUg UkVHX1NFVF9NQVNLKHgsIGJhc2UsIHJlZywgdiwgbW9kZSkgXAo+IC0JCV9fUkVHX1NFVF8jI21v ZGUoeCwgYmFzZSArIHJlZy5vZmZzZXQsIHJlZy5tYXNrLCByZWcuc2hpZnQsIHYpCj4gKyNkZWZp bmUgUkVHX1NFVF9NQVNLKHgsIGJhc2UsIHJlZywgbWFzaywgdiwgbW9kZSkgXAo+ICsJCV9fUkVH X1NFVF8jI21vZGUoeCwgYmFzZSArIHJlZy5vZmZzZXQsIG1hc2ssIHJlZy5zaGlmdCwgdikKPiAg IAo+ICAgI2RlZmluZSBWT1BfV0lOX1NFVCh4LCB3aW4sIG5hbWUsIHYpIFwKPiAgIAkJUkVHX1NF VCh4LCB3aW4tPmJhc2UsIHdpbi0+cGh5LT5uYW1lLCB2LCBSRUxBWEVEKQo+IEBAIC01OCwxNiAr NTgsMTggQEAKPiAgICNkZWZpbmUgVk9QX0lOVFJfR0VUKHZvcCwgbmFtZSkgXAo+ICAgCQl2b3Bf cmVhZF9yZWcodm9wLCAwLCAmdm9wLT5kYXRhLT5jdHJsLT5uYW1lKQo+ICAgCj4gLSNkZWZpbmUg Vk9QX0lOVFJfU0VUKHZvcCwgbmFtZSwgdikgXAo+IC0JCVJFR19TRVQodm9wLCAwLCB2b3AtPmRh dGEtPmludHItPm5hbWUsIHYsIE5PUk1BTCkKPiArI2RlZmluZSBWT1BfSU5UUl9TRVQodm9wLCBu YW1lLCBtYXNrLCB2KSBcCj4gKwkJUkVHX1NFVF9NQVNLKHZvcCwgMCwgdm9wLT5kYXRhLT5pbnRy LT5uYW1lLCBtYXNrLCB2LCBOT1JNQUwpCj4gICAjZGVmaW5lIFZPUF9JTlRSX1NFVF9UWVBFKHZv cCwgbmFtZSwgdHlwZSwgdikgXAo+ICAgCWRvIHsgXAo+IC0JCWludCBpLCByZWcgPSAwOyBcCj4g KwkJaW50IGksIHJlZyA9IDAsIG1hc2sgPSAwOyBcCj4gICAJCWZvciAoaSA9IDA7IGkgPCB2b3At PmRhdGEtPmludHItPm5pbnRyczsgaSsrKSB7IFwKPiAtCQkJaWYgKHZvcC0+ZGF0YS0+aW50ci0+ aW50cnNbaV0gJiB0eXBlKSBcCj4gKwkJCWlmICh2b3AtPmRhdGEtPmludHItPmludHJzW2ldICYg dHlwZSkgeyBcCj4gICAJCQkJcmVnIHw9ICh2KSA8PCBpOyBcCj4gKwkJCQltYXNrIHw9IDEgPDwg aTsgXAo+ICsJCQl9IFwKPiAgIAkJfSBcCj4gLQkJVk9QX0lOVFJfU0VUKHZvcCwgbmFtZSwgcmVn KTsgXAo+ICsJCVZPUF9JTlRSX1NFVCh2b3AsIG5hbWUsIG1hc2ssIHJlZyk7IFwKPiAgIAl9IHdo aWxlICgwKQo+ICAgI2RlZmluZSBWT1BfSU5UUl9HRVRfVFlQRSh2b3AsIG5hbWUsIHR5cGUpIFwK PiAgIAkJdm9wX2dldF9pbnRyX3R5cGUodm9wLCAmdm9wLT5kYXRhLT5pbnRyLT5uYW1lLCB0eXBl KQpIaSBKb2huCgpHcmVhdCwgaXQgd29ya3MgZm9yIG1lLCBUaGFua3MgZm9yIHRoaXMgZml4LgoK QXBwbGllZCB0byBteSBkcm0tbmV4dCBicmFuY2guCgotLSDvvK1hcmsgWWFvCgpfX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpkcmktZGV2ZWwgbWFpbGluZyBs aXN0CmRyaS1kZXZlbEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cDovL2xpc3RzLmZyZWVkZXNr dG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2RyaS1kZXZlbAo= From mboxrd@z Thu Jan 1 00:00:00 1970 From: mark.yao@rock-chips.com (Mark yao) Date: Wed, 13 Jan 2016 16:12:08 +0800 Subject: [PATCH] drm/rockchip: vop: fix mask when updating interrupts In-Reply-To: <1452621918-32239-1-git-send-email-john@metanate.com> References: <1452621918-32239-1-git-send-email-john@metanate.com> Message-ID: <569606D8.8060309@rock-chips.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 2016?01?13? 02:05, John Keeping wrote: > Commit dbb3d94 (drm/rockchip: vop: move interrupt registers into > vop_data) introduced new macros for updating the interrupt control > registers but these always use the mask from the register definition > without refining it for the particular bits that are being changed. > > This means that whenever we enable/disable a particular interrupt we end > up disabling all of the others as a side effect. > > Signed-off-by: John Keeping > --- > drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 16 +++++++++------- > 1 file changed, 9 insertions(+), 7 deletions(-) > > diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c > index 46c2a8d..fd37054 100644 > --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c > +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c > @@ -43,8 +43,8 @@ > > #define REG_SET(x, base, reg, v, mode) \ > __REG_SET_##mode(x, base + reg.offset, reg.mask, reg.shift, v) > -#define REG_SET_MASK(x, base, reg, v, mode) \ > - __REG_SET_##mode(x, base + reg.offset, reg.mask, reg.shift, v) > +#define REG_SET_MASK(x, base, reg, mask, v, mode) \ > + __REG_SET_##mode(x, base + reg.offset, mask, reg.shift, v) > > #define VOP_WIN_SET(x, win, name, v) \ > REG_SET(x, win->base, win->phy->name, v, RELAXED) > @@ -58,16 +58,18 @@ > #define VOP_INTR_GET(vop, name) \ > vop_read_reg(vop, 0, &vop->data->ctrl->name) > > -#define VOP_INTR_SET(vop, name, v) \ > - REG_SET(vop, 0, vop->data->intr->name, v, NORMAL) > +#define VOP_INTR_SET(vop, name, mask, v) \ > + REG_SET_MASK(vop, 0, vop->data->intr->name, mask, v, NORMAL) > #define VOP_INTR_SET_TYPE(vop, name, type, v) \ > do { \ > - int i, reg = 0; \ > + int i, reg = 0, mask = 0; \ > for (i = 0; i < vop->data->intr->nintrs; i++) { \ > - if (vop->data->intr->intrs[i] & type) \ > + if (vop->data->intr->intrs[i] & type) { \ > reg |= (v) << i; \ > + mask |= 1 << i; \ > + } \ > } \ > - VOP_INTR_SET(vop, name, reg); \ > + VOP_INTR_SET(vop, name, mask, reg); \ > } while (0) > #define VOP_INTR_GET_TYPE(vop, name, type) \ > vop_get_intr_type(vop, &vop->data->intr->name, type) Hi John Great, it works for me, Thanks for this fix. Applied to my drm-next branch. -- ?ark Yao From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755125AbcAMIMV (ORCPT ); Wed, 13 Jan 2016 03:12:21 -0500 Received: from regular1.263xmail.com ([211.150.99.134]:37785 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751225AbcAMIMT (ORCPT ); Wed, 13 Jan 2016 03:12:19 -0500 X-263anti-spam: KSV:0;BIG:0;ABS:1;DNS:0;ATT:0;SPF:S; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 1 X-SKE-CHECKED: 1 X-ADDR-CHECKED: 0 X-RL-SENDER: mark.yao@rock-chips.com X-FST-TO: linux-kernel@vger.kernel.org X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: mark.yao@rock-chips.com X-UNIQUE-TAG: <1db1589faa7d855f6065b0149b1caaac> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Message-ID: <569606D8.8060309@rock-chips.com> Date: Wed, 13 Jan 2016 16:12:08 +0800 From: Mark yao User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.8.0 MIME-Version: 1.0 To: John Keeping CC: Heiko Stuebner , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] drm/rockchip: vop: fix mask when updating interrupts References: <1452621918-32239-1-git-send-email-john@metanate.com> In-Reply-To: <1452621918-32239-1-git-send-email-john@metanate.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2016年01月13日 02:05, John Keeping wrote: > Commit dbb3d94 (drm/rockchip: vop: move interrupt registers into > vop_data) introduced new macros for updating the interrupt control > registers but these always use the mask from the register definition > without refining it for the particular bits that are being changed. > > This means that whenever we enable/disable a particular interrupt we end > up disabling all of the others as a side effect. > > Signed-off-by: John Keeping > --- > drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 16 +++++++++------- > 1 file changed, 9 insertions(+), 7 deletions(-) > > diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c > index 46c2a8d..fd37054 100644 > --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c > +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c > @@ -43,8 +43,8 @@ > > #define REG_SET(x, base, reg, v, mode) \ > __REG_SET_##mode(x, base + reg.offset, reg.mask, reg.shift, v) > -#define REG_SET_MASK(x, base, reg, v, mode) \ > - __REG_SET_##mode(x, base + reg.offset, reg.mask, reg.shift, v) > +#define REG_SET_MASK(x, base, reg, mask, v, mode) \ > + __REG_SET_##mode(x, base + reg.offset, mask, reg.shift, v) > > #define VOP_WIN_SET(x, win, name, v) \ > REG_SET(x, win->base, win->phy->name, v, RELAXED) > @@ -58,16 +58,18 @@ > #define VOP_INTR_GET(vop, name) \ > vop_read_reg(vop, 0, &vop->data->ctrl->name) > > -#define VOP_INTR_SET(vop, name, v) \ > - REG_SET(vop, 0, vop->data->intr->name, v, NORMAL) > +#define VOP_INTR_SET(vop, name, mask, v) \ > + REG_SET_MASK(vop, 0, vop->data->intr->name, mask, v, NORMAL) > #define VOP_INTR_SET_TYPE(vop, name, type, v) \ > do { \ > - int i, reg = 0; \ > + int i, reg = 0, mask = 0; \ > for (i = 0; i < vop->data->intr->nintrs; i++) { \ > - if (vop->data->intr->intrs[i] & type) \ > + if (vop->data->intr->intrs[i] & type) { \ > reg |= (v) << i; \ > + mask |= 1 << i; \ > + } \ > } \ > - VOP_INTR_SET(vop, name, reg); \ > + VOP_INTR_SET(vop, name, mask, reg); \ > } while (0) > #define VOP_INTR_GET_TYPE(vop, name, type) \ > vop_get_intr_type(vop, &vop->data->intr->name, type) Hi John Great, it works for me, Thanks for this fix. Applied to my drm-next branch. -- Ｍark Yao