diff for duplicates of <56995068.9050207@ezchip.com>

diff --git a/a/1.txt b/N1/1.txt
index a7a549f..0b786fa 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -32,3 +32,11 @@ v2 compatibility mode on GIC v3.
 -- 
 Chris Metcalf, EZChip Semiconductor
 http://www.ezchip.com
+
+-------------- next part --------------
+A non-text attachment was scrubbed...
+Name: 0001-gic-update-save-restore-pointers-only-when-gic-v3-de.patch
+Type: text/x-patch
+Size: 4775 bytes
+Desc: not available
+URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20160115/51d99c9a/attachment.bin>
diff --git a/a/2.hdr b/a/2.hdr
deleted file mode 100644
index 3b29897..0000000
--- a/a/2.hdr
+++ /dev/null
@@ -1,6 +0,0 @@
-Content-Type: text/x-patch;
-	name="0001-gic-update-save-restore-pointers-only-when-gic-v3-de.patch"
-Content-Transfer-Encoding: 7bit
-Content-Disposition: attachment;
-	filename*0="0001-gic-update-save-restore-pointers-only-when-gic-v3-de.pa";
-	filename*1="tch"
diff --git a/a/2.txt b/a/2.txt
deleted file mode 100644
index e3412cf..0000000
--- a/a/2.txt
+++ /dev/null
@@ -1,151 +0,0 @@
->From 3dcb529de23adb918b9a4d6eca717c737f380bc3 Mon Sep 17 00:00:00 2001
-From: Chris Metcalf <cmetcalf@ezchip.com>
-Date: Fri, 15 Jan 2016 13:18:06 -0500
-Subject: [PATCH] gic: update save/restore pointers only when gic v3 detected
-
-The original code set up the VGIC save/restore calls in
-__kvm_vcpu_run() based on whether the GIC had been detected as v2 or
-v3. Commit 8a14849b4a35 ("arm64: KVM: Switch vgic save/restore to
-alternative_insn") switched to making that choice based on whether
-the processor feature register reports that the system register
-interface to the GIC CPU interface is supported.
-
-However, booting up with the GIC v3 in v2 compatibility mode (in
-this case on the Linaro Foundation Model simulator) we find that
-the v3 save/restore isn't the right thing, since we end up with no
-timer interrupts being delivered to the KVM guest.  Reverting to
-a model where we set up the VGIC save/restore calls based on the
-actual GIC type fixes this.
-
-To do this and still keep the simplicity of the "alternatives"
-model, we instead leave the v2 branch-and-link instruction in place,
-but patch it dynamically to be a branch-and-link to the v3 routines
-if we detect a v3 GIC.
-
-Signed-off-by: Chris Metcalf <cmetcalf@ezchip.com>
----
- arch/arm/include/asm/kvm_host.h   |  5 +++++
- arch/arm64/include/asm/kvm_host.h | 37 +++++++++++++++++++++++++++++++++++++
- arch/arm64/kvm/hyp.S              | 14 ++++----------
- virt/kvm/arm/vgic.c               |  3 +++
- 4 files changed, 49 insertions(+), 10 deletions(-)
-
-diff --git a/arch/arm/include/asm/kvm_host.h b/arch/arm/include/asm/kvm_host.h
-index c4072d9f32c7..a34ce4d73498 100644
---- a/arch/arm/include/asm/kvm_host.h
-+++ b/arch/arm/include/asm/kvm_host.h
-@@ -216,6 +216,11 @@ static inline int kvm_arch_dev_ioctl_check_extension(long ext)
- 	return 0;
- }
- 
-+static inline void vgic_arch_setup(const struct vgic_params *vgic)
-+{
-+	BUG_ON(vgic->type != VGIC_V2);
-+}
-+
- int kvm_perf_init(void);
- int kvm_perf_teardown(void);
- 
-diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
-index ed039688c221..9ce98e69b5ec 100644
---- a/arch/arm64/include/asm/kvm_host.h
-+++ b/arch/arm64/include/asm/kvm_host.h
-@@ -27,6 +27,7 @@
- #include <asm/kvm.h>
- #include <asm/kvm_asm.h>
- #include <asm/kvm_mmio.h>
-+#include <asm/insn.h>
- 
- #define __KVM_HAVE_ARCH_INTC_INITIALIZED
- 
-@@ -244,6 +245,42 @@ static inline void __cpu_init_hyp_mode(phys_addr_t boot_pgd_ptr,
- 		     hyp_stack_ptr, vector_ptr);
- }
- 
-+#ifdef CONFIG_ARM_GIC_V3
-+/* Write a 'bl FUNC' instruction at address CALLSITE. */
-+static inline void vgic_patch(char *callsite, char *func)
-+{
-+	aarch64_insn_patch_text_nosync(
-+		callsite,
-+		aarch64_insn_gen_branch_imm((long)callsite, (long)func,
-+					    AARCH64_INSN_BRANCH_LINK));
-+}
-+#endif
-+
-+static inline void vgic_arch_setup(const struct vgic_params *vgic)
-+{
-+	switch(vgic->type)
-+	{
-+	case VGIC_V2:
-+		break;
-+
-+#ifdef CONFIG_ARM_GIC_V3
-+	case VGIC_V3:
-+	{
-+		extern char __save_vgic_state_insn[];
-+		extern char __save_vgic_v3_state[];
-+		extern char __restore_vgic_state_insn[];
-+		extern char __restore_vgic_v3_state[];
-+		vgic_patch(__save_vgic_state_insn, __save_vgic_v3_state);
-+		vgic_patch(__restore_vgic_state_insn, __restore_vgic_v3_state);
-+		break;
-+	}
-+#endif
-+
-+	default:
-+		BUG();
-+	}
-+}
-+
- static inline void kvm_arch_hardware_disable(void) {}
- static inline void kvm_arch_hardware_unsetup(void) {}
- static inline void kvm_arch_sync_events(struct kvm *kvm) {}
-diff --git a/arch/arm64/kvm/hyp.S b/arch/arm64/kvm/hyp.S
-index e5836138ec42..6b1eded53051 100644
---- a/arch/arm64/kvm/hyp.S
-+++ b/arch/arm64/kvm/hyp.S
-@@ -518,11 +518,8 @@
-  * Call into the vgic backend for state saving
-  */
- .macro save_vgic_state
--alternative_if_not ARM64_HAS_SYSREG_GIC_CPUIF
--	bl	__save_vgic_v2_state
--alternative_else
--	bl	__save_vgic_v3_state
--alternative_endif
-+ENTRY(__save_vgic_state_insn)
-+	bl	__save_vgic_v2_state // may update to __save_vgic_v3_state
- 	mrs	x24, hcr_el2
- 	mov	x25, #HCR_INT_OVERRIDE
- 	neg	x25, x25
-@@ -539,11 +536,8 @@ alternative_endif
- 	orr	x24, x24, #HCR_INT_OVERRIDE
- 	orr	x24, x24, x25
- 	msr	hcr_el2, x24
--alternative_if_not ARM64_HAS_SYSREG_GIC_CPUIF
--	bl	__restore_vgic_v2_state
--alternative_else
--	bl	__restore_vgic_v3_state
--alternative_endif
-+ENTRY(__restore_vgic_state_insn)
-+	bl	__restore_vgic_v2_state // may update to __restore_vgic_v3_state
- .endm
- 
- .macro save_timer_state
-diff --git a/virt/kvm/arm/vgic.c b/virt/kvm/arm/vgic.c
-index 66c66165e712..8b4215414d11 100644
---- a/virt/kvm/arm/vgic.c
-+++ b/virt/kvm/arm/vgic.c
-@@ -2502,6 +2502,9 @@ int kvm_vgic_hyp_init(void)
- 		goto out_free_irq;
- 	}
- 
-+	/* Callback into for arch code for setup */
-+	vgic_arch_setup(vgic);
-+
- 	on_each_cpu(vgic_init_maintenance_interrupt, NULL, 1);
- 
- 	return 0;
--- 
-2.1.2
diff --git a/a/3.hdr b/a/3.hdr
deleted file mode 100644
index 4b86001..0000000
--- a/a/3.hdr
+++ /dev/null
@@ -1,4 +0,0 @@
-Content-Type: text/plain; charset="us-ascii"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 7bit
-Content-Disposition: inline
diff --git a/a/3.txt b/a/3.txt
deleted file mode 100644
index 8133cf0..0000000
--- a/a/3.txt
+++ /dev/null
@@ -1,4 +0,0 @@
-_______________________________________________
-linux-arm-kernel mailing list
-linux-arm-kernel@lists.infradead.org
-http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
diff --git a/a/content_digest b/N1/content_digest
index 4dcc123..e4900f0 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,11 +1,8 @@
- "From\0Chris Metcalf <cmetcalf@ezchip.com>\0"
+ "From\0cmetcalf@ezchip.com (Chris Metcalf)\0"
  "Subject\0[PATCH] help guest boot up on AArch64 host with GICv2\0"
  "Date\0Fri, 15 Jan 2016 15:02:48 -0500\0"
- "To\0Marc Zyngier <marc.zyngier@arm.com>"
-  Christoffer Dall <christoffer.dall@linaro.org>
-  linux-arm-kernel@lists.infradead.org
- " kvmarm@lists.cs.columbia.edu\0"
- "\01:1\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
+ "\00:1\0"
  "b\0"
  "We are using GICv2 compatibility mode in the Fast Models/Foundation \n"
  "Models simulations we are running because the boot code (ATF/UEFI) \n"
@@ -40,166 +37,14 @@
  "\n"
  "-- \n"
  "Chris Metcalf, EZChip Semiconductor\n"
- http://www.ezchip.com
- "\01:2\0"
- "fn\00001-gic-update-save-restore-pointers-only-when-gic-v3-de.patch\0"
- "b\0"
- ">From 3dcb529de23adb918b9a4d6eca717c737f380bc3 Mon Sep 17 00:00:00 2001\n"
- "From: Chris Metcalf <cmetcalf@ezchip.com>\n"
- "Date: Fri, 15 Jan 2016 13:18:06 -0500\n"
- "Subject: [PATCH] gic: update save/restore pointers only when gic v3 detected\n"
- "\n"
- "The original code set up the VGIC save/restore calls in\n"
- "__kvm_vcpu_run() based on whether the GIC had been detected as v2 or\n"
- "v3. Commit 8a14849b4a35 (\"arm64: KVM: Switch vgic save/restore to\n"
- "alternative_insn\") switched to making that choice based on whether\n"
- "the processor feature register reports that the system register\n"
- "interface to the GIC CPU interface is supported.\n"
- "\n"
- "However, booting up with the GIC v3 in v2 compatibility mode (in\n"
- "this case on the Linaro Foundation Model simulator) we find that\n"
- "the v3 save/restore isn't the right thing, since we end up with no\n"
- "timer interrupts being delivered to the KVM guest.  Reverting to\n"
- "a model where we set up the VGIC save/restore calls based on the\n"
- "actual GIC type fixes this.\n"
- "\n"
- "To do this and still keep the simplicity of the \"alternatives\"\n"
- "model, we instead leave the v2 branch-and-link instruction in place,\n"
- "but patch it dynamically to be a branch-and-link to the v3 routines\n"
- "if we detect a v3 GIC.\n"
- "\n"
- "Signed-off-by: Chris Metcalf <cmetcalf@ezchip.com>\n"
- "---\n"
- " arch/arm/include/asm/kvm_host.h   |  5 +++++\n"
- " arch/arm64/include/asm/kvm_host.h | 37 +++++++++++++++++++++++++++++++++++++\n"
- " arch/arm64/kvm/hyp.S              | 14 ++++----------\n"
- " virt/kvm/arm/vgic.c               |  3 +++\n"
- " 4 files changed, 49 insertions(+), 10 deletions(-)\n"
- "\n"
- "diff --git a/arch/arm/include/asm/kvm_host.h b/arch/arm/include/asm/kvm_host.h\n"
- "index c4072d9f32c7..a34ce4d73498 100644\n"
- "--- a/arch/arm/include/asm/kvm_host.h\n"
- "+++ b/arch/arm/include/asm/kvm_host.h\n"
- "@@ -216,6 +216,11 @@ static inline int kvm_arch_dev_ioctl_check_extension(long ext)\n"
- " \treturn 0;\n"
- " }\n"
- " \n"
- "+static inline void vgic_arch_setup(const struct vgic_params *vgic)\n"
- "+{\n"
- "+\tBUG_ON(vgic->type != VGIC_V2);\n"
- "+}\n"
- "+\n"
- " int kvm_perf_init(void);\n"
- " int kvm_perf_teardown(void);\n"
- " \n"
- "diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h\n"
- "index ed039688c221..9ce98e69b5ec 100644\n"
- "--- a/arch/arm64/include/asm/kvm_host.h\n"
- "+++ b/arch/arm64/include/asm/kvm_host.h\n"
- "@@ -27,6 +27,7 @@\n"
- " #include <asm/kvm.h>\n"
- " #include <asm/kvm_asm.h>\n"
- " #include <asm/kvm_mmio.h>\n"
- "+#include <asm/insn.h>\n"
- " \n"
- " #define __KVM_HAVE_ARCH_INTC_INITIALIZED\n"
- " \n"
- "@@ -244,6 +245,42 @@ static inline void __cpu_init_hyp_mode(phys_addr_t boot_pgd_ptr,\n"
- " \t\t     hyp_stack_ptr, vector_ptr);\n"
- " }\n"
- " \n"
- "+#ifdef CONFIG_ARM_GIC_V3\n"
- "+/* Write a 'bl FUNC' instruction at address CALLSITE. */\n"
- "+static inline void vgic_patch(char *callsite, char *func)\n"
- "+{\n"
- "+\taarch64_insn_patch_text_nosync(\n"
- "+\t\tcallsite,\n"
- "+\t\taarch64_insn_gen_branch_imm((long)callsite, (long)func,\n"
- "+\t\t\t\t\t    AARCH64_INSN_BRANCH_LINK));\n"
- "+}\n"
- "+#endif\n"
- "+\n"
- "+static inline void vgic_arch_setup(const struct vgic_params *vgic)\n"
- "+{\n"
- "+\tswitch(vgic->type)\n"
- "+\t{\n"
- "+\tcase VGIC_V2:\n"
- "+\t\tbreak;\n"
- "+\n"
- "+#ifdef CONFIG_ARM_GIC_V3\n"
- "+\tcase VGIC_V3:\n"
- "+\t{\n"
- "+\t\textern char __save_vgic_state_insn[];\n"
- "+\t\textern char __save_vgic_v3_state[];\n"
- "+\t\textern char __restore_vgic_state_insn[];\n"
- "+\t\textern char __restore_vgic_v3_state[];\n"
- "+\t\tvgic_patch(__save_vgic_state_insn, __save_vgic_v3_state);\n"
- "+\t\tvgic_patch(__restore_vgic_state_insn, __restore_vgic_v3_state);\n"
- "+\t\tbreak;\n"
- "+\t}\n"
- "+#endif\n"
- "+\n"
- "+\tdefault:\n"
- "+\t\tBUG();\n"
- "+\t}\n"
- "+}\n"
- "+\n"
- " static inline void kvm_arch_hardware_disable(void) {}\n"
- " static inline void kvm_arch_hardware_unsetup(void) {}\n"
- " static inline void kvm_arch_sync_events(struct kvm *kvm) {}\n"
- "diff --git a/arch/arm64/kvm/hyp.S b/arch/arm64/kvm/hyp.S\n"
- "index e5836138ec42..6b1eded53051 100644\n"
- "--- a/arch/arm64/kvm/hyp.S\n"
- "+++ b/arch/arm64/kvm/hyp.S\n"
- "@@ -518,11 +518,8 @@\n"
- "  * Call into the vgic backend for state saving\n"
- "  */\n"
- " .macro save_vgic_state\n"
- "-alternative_if_not ARM64_HAS_SYSREG_GIC_CPUIF\n"
- "-\tbl\t__save_vgic_v2_state\n"
- "-alternative_else\n"
- "-\tbl\t__save_vgic_v3_state\n"
- "-alternative_endif\n"
- "+ENTRY(__save_vgic_state_insn)\n"
- "+\tbl\t__save_vgic_v2_state // may update to __save_vgic_v3_state\n"
- " \tmrs\tx24, hcr_el2\n"
- " \tmov\tx25, #HCR_INT_OVERRIDE\n"
- " \tneg\tx25, x25\n"
- "@@ -539,11 +536,8 @@ alternative_endif\n"
- " \torr\tx24, x24, #HCR_INT_OVERRIDE\n"
- " \torr\tx24, x24, x25\n"
- " \tmsr\thcr_el2, x24\n"
- "-alternative_if_not ARM64_HAS_SYSREG_GIC_CPUIF\n"
- "-\tbl\t__restore_vgic_v2_state\n"
- "-alternative_else\n"
- "-\tbl\t__restore_vgic_v3_state\n"
- "-alternative_endif\n"
- "+ENTRY(__restore_vgic_state_insn)\n"
- "+\tbl\t__restore_vgic_v2_state // may update to __restore_vgic_v3_state\n"
- " .endm\n"
- " \n"
- " .macro save_timer_state\n"
- "diff --git a/virt/kvm/arm/vgic.c b/virt/kvm/arm/vgic.c\n"
- "index 66c66165e712..8b4215414d11 100644\n"
- "--- a/virt/kvm/arm/vgic.c\n"
- "+++ b/virt/kvm/arm/vgic.c\n"
- "@@ -2502,6 +2502,9 @@ int kvm_vgic_hyp_init(void)\n"
- " \t\tgoto out_free_irq;\n"
- " \t}\n"
- " \n"
- "+\t/* Callback into for arch code for setup */\n"
- "+\tvgic_arch_setup(vgic);\n"
- "+\n"
- " \ton_each_cpu(vgic_init_maintenance_interrupt, NULL, 1);\n"
- " \n"
- " \treturn 0;\n"
- "-- \n"
- 2.1.2
- "\01:3\0"
- "b\0"
- "_______________________________________________\n"
- "linux-arm-kernel mailing list\n"
- "linux-arm-kernel@lists.infradead.org\n"
- http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
+ "http://www.ezchip.com\n"
+ "\n"
+ "-------------- next part --------------\n"
+ "A non-text attachment was scrubbed...\n"
+ "Name: 0001-gic-update-save-restore-pointers-only-when-gic-v3-de.patch\n"
+ "Type: text/x-patch\n"
+ "Size: 4775 bytes\n"
+ "Desc: not available\n"
+ URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20160115/51d99c9a/attachment.bin>
 
-1fdaef7392467ec15da8ac80232340929969352cf9e11d7c7b21bc34d36fe93e
+925a8623aee89dd739e3f38b089fc7a8b679bfb59a7bb75e52ea1c1739d60484
