From: Nick Hoath <nicholas.hoath@intel.com>
To: Arun Siluvery <arun.siluvery@linux.intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH v2 8/8] drm/i915/gen9: Add WaOCLCoherentLineFlush
Date: Thu, 21 Jan 2016 14:42:00 +0000 [thread overview]
Message-ID: <56A0EE38.9020501@intel.com> (raw)
In-Reply-To: <1453384847-16361-9-git-send-email-arun.siluvery@linux.intel.com>
On 21/01/2016 14:00, Arun Siluvery wrote:
> This is mainly required for preemption.
>
> Cc: Dave Gordon <david.s.gordon@intel.com>
> Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
> ---
> drivers/gpu/drm/i915/intel_ringbuffer.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index e91fb70..f26f274 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -979,6 +979,10 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring)
> /* WaDisableSTUnitPowerOptimization:skl,bxt */
> WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN2, GEN8_ST_PO_DISABLE);
>
> + /* WaOCLCoherentLineFlush:skl,bxt */
> + I915_WRITE(GEN8_L3SQCREG4, (I915_READ(GEN8_L3SQCREG4) |
> + GEN8_LQSC_FLUSH_COHERENT_LINES));
> +
> /* WaEnablePreemptionGranularityControlByUMD:skl,bxt */
> ret= wa_ring_whitelist_reg(ring, GEN8_CS_CHICKEN1);
> if (ret)
>
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next prev parent reply other threads:[~2016-01-21 14:42 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-21 14:00 [PATCH v2 0/8] Gen9 HW whitelist and Preemption WA patches Arun Siluvery
2016-01-21 14:00 ` [PATCH v2 1/8] drm/i915/gen9: Add framework to whitelist specific GPU registers Arun Siluvery
2016-01-21 14:00 ` [PATCH v2 2/8] drm/i915/gen9: Add GEN8_CS_CHICKEN1 to HW whitelist Arun Siluvery
2016-01-21 14:00 ` [PATCH v2 3/8] drm/i915/gen9: Add HDC_CHICKEN1 " Arun Siluvery
2016-01-21 14:00 ` [PATCH v2 4/8] drm/i915/bxt: Add GEN9_CS_DEBUG_MODE1 " Arun Siluvery
2016-01-21 14:40 ` Nick Hoath
2016-01-21 14:00 ` [PATCH v2 5/8] drm/i915/bxt: Add GEN8_L3SQCREG4 " Arun Siluvery
2016-01-21 14:00 ` [PATCH v2 6/8] drm/i915/skl: " Arun Siluvery
2016-01-21 14:00 ` [PATCH v2 7/8] drm/i915/skl: Enable Per context Preemption granularity control Arun Siluvery
2016-01-21 14:41 ` Nick Hoath
2016-01-21 14:00 ` [PATCH v2 8/8] drm/i915/gen9: Add WaOCLCoherentLineFlush Arun Siluvery
2016-01-21 14:42 ` Nick Hoath [this message]
2016-01-21 14:25 ` ✗ Fi.CI.BAT: warning for Gen9 HW whitelist and Preemption WA patches (rev2) Patchwork
2016-01-21 14:36 ` Arun Siluvery
2016-01-21 15:17 ` [PATCH v2 0/8] Gen9 HW whitelist and Preemption WA patches Chris Wilson
2016-01-21 16:07 ` Arun Siluvery
2016-01-21 16:56 ` Chris Wilson
2016-01-21 17:35 ` Arun Siluvery
2016-01-25 18:01 ` Daniel Vetter
2016-01-25 18:23 ` Arun Siluvery
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