From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60249) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aORnW-0004Lf-KV for qemu-devel@nongnu.org; Wed, 27 Jan 2016 10:14:19 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aORnS-0004ou-He for qemu-devel@nongnu.org; Wed, 27 Jan 2016 10:14:18 -0500 Received: from greensocs.com ([193.104.36.180]:54773) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aORnS-0004oq-85 for qemu-devel@nongnu.org; Wed, 27 Jan 2016 10:14:14 -0500 References: <96f47ac98d1cd540144f9b70bb5dc8650e5c9831.1453237258.git.alistair.francis@xilinx.com> From: KONRAD Frederic Message-ID: <56A8DEC2.70609@greensocs.com> Date: Wed, 27 Jan 2016 16:14:10 +0100 MIME-Version: 1.0 In-Reply-To: <96f47ac98d1cd540144f9b70bb5dc8650e5c9831.1453237258.git.alistair.francis@xilinx.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH v2 06/16] register: QOMify List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alistair Francis , qemu-devel@nongnu.org Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org, crosthwaitepeter@gmail.com, afaerber@suse.de, edgar.iglesias@gmail.com Le 19/01/2016 23:35, Alistair Francis a =E9crit : > From: Peter Crosthwaite > > QOMify registers as a child of TYPE_DEVICE. This allows registers to > define GPIOs. > > Define an init helper that will do QOM initialisation as well as setup > the r/w fast paths. > > Signed-off-by: Peter Crosthwaite > Signed-off-by: Alistair Francis > --- > > hw/core/register.c | 34 ++++++++++++++++++++++++++++++++++ > include/hw/register.h | 17 +++++++++++++++++ > 2 files changed, 51 insertions(+) > > diff --git a/hw/core/register.c b/hw/core/register.c > index ca10cff..000b87f 100644 > --- a/hw/core/register.c > +++ b/hw/core/register.c > @@ -185,6 +185,28 @@ void register_reset(RegisterInfo *reg) > register_write_val(reg, reg->access->reset); > } > =20 > +void register_init(RegisterInfo *reg) > +{ > + assert(reg); > + const RegisterAccessInfo *ac; > + > + if (!reg->data || !reg->access) { > + return; > + } > + > + object_initialize((void *)reg, sizeof(*reg), TYPE_REGISTER); > + > + ac =3D reg->access; > + > + /* if there are no debug msgs and no RMW requirement, mark for fas= t write */ > + reg->write_lite =3D reg->debug || ac->ro || ac->w1c || ac->pre_wri= te || > + ((ac->ge0 || ac->ge1) && qemu_loglevel_mask(LOG_GUEST_ERRO= R)) || > + ((ac->ui0 || ac->ui1) && qemu_loglevel_mask(LOG_UNIMP)) > + ? false : true; > + /* no debug and no clear-on-read is a fast read */ > + reg->read_lite =3D reg->debug || ac->cor ? false : true; > +} > + > static inline void register_write_memory(void *opaque, hwaddr addr, > uint64_t value, unsigned siz= e, bool be) > { > @@ -232,3 +254,15 @@ uint64_t register_read_memory_le(void *opaque, hwa= ddr addr, unsigned size) > { > return register_read_memory(opaque, addr, size, false); > } > + > +static const TypeInfo register_info =3D { > + .name =3D TYPE_REGISTER, > + .parent =3D TYPE_DEVICE, > +}; > + > +static void register_register_types(void) > +{ > + type_register_static(®ister_info); > +} > + > +type_init(register_register_types) > diff --git a/include/hw/register.h b/include/hw/register.h > index 0c6f03d..6677dee 100644 > --- a/include/hw/register.h > +++ b/include/hw/register.h > @@ -11,6 +11,7 @@ > #ifndef REGISTER_H > #define REGISTER_H > =20 > +#include "hw/qdev-core.h" > #include "exec/memory.h" > =20 > typedef struct RegisterInfo RegisterInfo; > @@ -101,6 +102,11 @@ struct RegisterAccessInfo { > */ > =20 > struct RegisterInfo { > + /*< private >*/ > + DeviceState parent_obj; > + > + /*< public >*/ > + > void *data; > int data_size; > =20 > @@ -119,6 +125,9 @@ struct RegisterInfo { > MemoryRegion mem; > }; > =20 > +#define TYPE_REGISTER "qemu,register" > +#define REGISTER(obj) OBJECT_CHECK(RegisterInfo, (obj), TYPE_REGISTER) > + > /** > * write a value to a register, subject to its restrictions > * @reg: register to write to > @@ -144,6 +153,14 @@ uint64_t register_read(RegisterInfo *reg); > void register_reset(RegisterInfo *reg); > =20 > /** > + * Initialize a register. GPIO's are setup as IOs to the specified dev= ice. > + * Fast paths for eligible registers are enabled. > + * @reg: Register to initialize > + */ > + > +void register_init(RegisterInfo *reg); > + > +/** > * Memory API MMIO write handler that will write to a Register API re= gister. > * _be for big endian variant and _le for little endian. > * @opaque: RegisterInfo to write to seems ok to me Reviewed-by: KONRAD Frederic Fred