From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60999) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aORqR-0005Ko-F6 for qemu-devel@nongnu.org; Wed, 27 Jan 2016 10:17:23 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aORqN-0005c2-El for qemu-devel@nongnu.org; Wed, 27 Jan 2016 10:17:19 -0500 Received: from greensocs.com ([193.104.36.180]:56310) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aORqN-0005bw-4v for qemu-devel@nongnu.org; Wed, 27 Jan 2016 10:17:15 -0500 References: From: KONRAD Frederic Message-ID: <56A8DF78.2060905@greensocs.com> Date: Wed, 27 Jan 2016 16:17:12 +0100 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH v2 07/16] register: Add block initialise helper List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alistair Francis , qemu-devel@nongnu.org Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org, crosthwaitepeter@gmail.com, afaerber@suse.de, edgar.iglesias@gmail.com Le 19/01/2016 23:35, Alistair Francis a =E9crit : > From: Peter Crosthwaite > > Add a helper that will scan a static RegisterAccessInfo Array > and populate a container MemoryRegion with registers as defined. > > Signed-off-by: Peter Crosthwaite > Signed-off-by: Alistair Francis > --- > V2: > - Use memory_region_add_subregion_no_print() > > hw/core/register.c | 29 +++++++++++++++++++++++++++++ > include/hw/register.h | 21 +++++++++++++++++++++ > 2 files changed, 50 insertions(+) > > diff --git a/hw/core/register.c b/hw/core/register.c > index 000b87f..116fd0b 100644 > --- a/hw/core/register.c > +++ b/hw/core/register.c > @@ -255,6 +255,35 @@ uint64_t register_read_memory_le(void *opaque, hwa= ddr addr, unsigned size) > return register_read_memory(opaque, addr, size, false); > } > =20 > +void register_init_block32(DeviceState *owner, const RegisterAccessInf= o *rae, > + int num, RegisterInfo *ri, uint32_t *data, > + MemoryRegion *container, const MemoryRegion= Ops *ops, > + bool debug_enabled) > +{ > + const char *debug_prefix =3D object_get_typename(OBJECT(owner)); > + int i; > + > + for (i =3D 0; i < num; i++) { > + int index =3D rae[i].decode.addr / 4; > + RegisterInfo *r =3D &ri[index]; > + > + *r =3D (RegisterInfo) { > + .data =3D &data[index], > + .data_size =3D sizeof(uint32_t), > + .access =3D &rae[i], > + .debug =3D debug_enabled, > + .prefix =3D debug_prefix, > + .opaque =3D owner, > + }; > + register_init(r); > + > + memory_region_init_io(&r->mem, OBJECT(owner), ops, r, r->acces= s->name, > + sizeof(uint32_t)); > + memory_region_add_subregion_no_print(container, > + r->access->decode.addr, &= r->mem); > + } > +} > + > static const TypeInfo register_info =3D { > .name =3D TYPE_REGISTER, > .parent =3D TYPE_DEVICE, > diff --git a/include/hw/register.h b/include/hw/register.h > index 6677dee..f3e4c2c 100644 > --- a/include/hw/register.h > +++ b/include/hw/register.h > @@ -186,6 +186,27 @@ void register_write_memory_le(void *opaque, hwaddr= addr, uint64_t value, > uint64_t register_read_memory_be(void *opaque, hwaddr addr, unsigned = size); > uint64_t register_read_memory_le(void *opaque, hwaddr addr, unsigned = size); > =20 > +/** > + * Init a block of consecutive registers into a container MemoryRegion= . A > + * number of constant register definitions are parsed to create a corr= esponding > + * array of RegisterInfo's. > + * > + * @owner: device owning the registers > + * @rae: Register definitions to init > + * @num: number of registers to init (length of @rae) > + * @ri: Register array to init > + * @data: Array to use for register data > + * @container: Memory region to contain new registers > + * @ops: Memory region ops to use to access registers. Opaque data of = handler > + * with be a RegisterInfo * (from @ri) typo here Fred > + * @debug enabled: turn on/off verbose debug information > + */ > + > +void register_init_block32(DeviceState *owner, const RegisterAccessInf= o *rae, > + int num, RegisterInfo *ri, uint32_t *data, > + MemoryRegion *container, const MemoryRegion= Ops *ops, > + bool debug_enabled); > + > /* Define constants for a 32 bit register */ > #define REG32(reg, addr) = \ > enum { A_ ## reg =3D (addr) }; = \