From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Subject: Re: [PATCH] clk: ti: omap3+: dpll: use non-locking version of clk_get_rate To: Tony Lindgren References: <1453981067-8618-1-git-send-email-t-kristo@ti.com> <56A9FED1.3090903@ti.com> <20160128172215.GD19432@atomide.com> CC: , , , , From: Tero Kristo Message-ID: <56AA6261.7030503@ti.com> Date: Thu, 28 Jan 2016 20:48:01 +0200 MIME-Version: 1.0 In-Reply-To: <20160128172215.GD19432@atomide.com> Content-Type: text/plain; charset="windows-1252"; format=flowed List-ID: On 01/28/2016 07:22 PM, Tony Lindgren wrote: > * Tero Kristo [160128 03:44]: >> On 01/28/2016 01:37 PM, Tero Kristo wrote: >>> As the code in this file is being executed within irq context in some >>> cases, we must avoid the clk_get_rate which uses mutex internally. >>> Switch the code to use clk_hw_get_rate instead which is non-locking. >>> >>> Signed-off-by: Tero Kristo >> >> Ooops, sorry. Sent wrong version (read: old) of this patch, please ignore >> this one. Will re-send the correct version in a bit. > > I think this is still needed as a fix for -rc cycle with cc: stable > as otherwise we have omap4 and 5 hang if PM runtime is enabled before > a suspend/resume cycle? Look at the other patch I sent, it should accomplish the same thing, and more. https://www.spinics.net/lists/linux-clk/msg06094.html -Tero > > Regards, > > Tony > > >>> drivers/clk/ti/dpll3xxx.c | 3 ++- >>> 1 file changed, 2 insertions(+), 1 deletion(-) >>> >>> diff --git a/drivers/clk/ti/dpll3xxx.c b/drivers/clk/ti/dpll3xxx.c >>> index f4dec00..7ed24bc 100644 >>> --- a/drivers/clk/ti/dpll3xxx.c >>> +++ b/drivers/clk/ti/dpll3xxx.c >>> @@ -437,7 +437,8 @@ int omap3_noncore_dpll_enable(struct clk_hw *hw) >>> >>> parent = clk_hw_get_parent(hw); >>> >>> - if (clk_hw_get_rate(hw) == clk_get_rate(dd->clk_bypass)) { >>> + if (clk_hw_get_rate(hw) == >>> + clk_hw_get_rate(__clk_get_hw(dd->clk_bypass))) { >>> WARN_ON(parent != __clk_get_hw(dd->clk_bypass)); >>> r = _omap3_noncore_dpll_bypass(clk); >>> } else { >>> >> From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tero Kristo Subject: Re: [PATCH] clk: ti: omap3+: dpll: use non-locking version of clk_get_rate Date: Thu, 28 Jan 2016 20:48:01 +0200 Message-ID: <56AA6261.7030503@ti.com> References: <1453981067-8618-1-git-send-email-t-kristo@ti.com> <56A9FED1.3090903@ti.com> <20160128172215.GD19432@atomide.com> Mime-Version: 1.0 Content-Type: text/plain; charset="windows-1252"; format=flowed Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20160128172215.GD19432@atomide.com> Sender: linux-clk-owner@vger.kernel.org To: Tony Lindgren Cc: linux-omap@vger.kernel.org, linux-clk@vger.kernel.org, mturquette@baylibre.com, sboyd@codeaurora.org, linux-arm-kernel@lists.infradead.org List-Id: linux-omap@vger.kernel.org On 01/28/2016 07:22 PM, Tony Lindgren wrote: > * Tero Kristo [160128 03:44]: >> On 01/28/2016 01:37 PM, Tero Kristo wrote: >>> As the code in this file is being executed within irq context in some >>> cases, we must avoid the clk_get_rate which uses mutex internally. >>> Switch the code to use clk_hw_get_rate instead which is non-locking. >>> >>> Signed-off-by: Tero Kristo >> >> Ooops, sorry. Sent wrong version (read: old) of this patch, please ignore >> this one. Will re-send the correct version in a bit. > > I think this is still needed as a fix for -rc cycle with cc: stable > as otherwise we have omap4 and 5 hang if PM runtime is enabled before > a suspend/resume cycle? Look at the other patch I sent, it should accomplish the same thing, and more. https://www.spinics.net/lists/linux-clk/msg06094.html -Tero > > Regards, > > Tony > > >>> drivers/clk/ti/dpll3xxx.c | 3 ++- >>> 1 file changed, 2 insertions(+), 1 deletion(-) >>> >>> diff --git a/drivers/clk/ti/dpll3xxx.c b/drivers/clk/ti/dpll3xxx.c >>> index f4dec00..7ed24bc 100644 >>> --- a/drivers/clk/ti/dpll3xxx.c >>> +++ b/drivers/clk/ti/dpll3xxx.c >>> @@ -437,7 +437,8 @@ int omap3_noncore_dpll_enable(struct clk_hw *hw) >>> >>> parent = clk_hw_get_parent(hw); >>> >>> - if (clk_hw_get_rate(hw) == clk_get_rate(dd->clk_bypass)) { >>> + if (clk_hw_get_rate(hw) == >>> + clk_hw_get_rate(__clk_get_hw(dd->clk_bypass))) { >>> WARN_ON(parent != __clk_get_hw(dd->clk_bypass)); >>> r = _omap3_noncore_dpll_bypass(clk); >>> } else { >>> >> From mboxrd@z Thu Jan 1 00:00:00 1970 From: t-kristo@ti.com (Tero Kristo) Date: Thu, 28 Jan 2016 20:48:01 +0200 Subject: [PATCH] clk: ti: omap3+: dpll: use non-locking version of clk_get_rate In-Reply-To: <20160128172215.GD19432@atomide.com> References: <1453981067-8618-1-git-send-email-t-kristo@ti.com> <56A9FED1.3090903@ti.com> <20160128172215.GD19432@atomide.com> Message-ID: <56AA6261.7030503@ti.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 01/28/2016 07:22 PM, Tony Lindgren wrote: > * Tero Kristo [160128 03:44]: >> On 01/28/2016 01:37 PM, Tero Kristo wrote: >>> As the code in this file is being executed within irq context in some >>> cases, we must avoid the clk_get_rate which uses mutex internally. >>> Switch the code to use clk_hw_get_rate instead which is non-locking. >>> >>> Signed-off-by: Tero Kristo >> >> Ooops, sorry. Sent wrong version (read: old) of this patch, please ignore >> this one. Will re-send the correct version in a bit. > > I think this is still needed as a fix for -rc cycle with cc: stable > as otherwise we have omap4 and 5 hang if PM runtime is enabled before > a suspend/resume cycle? Look at the other patch I sent, it should accomplish the same thing, and more. https://www.spinics.net/lists/linux-clk/msg06094.html -Tero > > Regards, > > Tony > > >>> drivers/clk/ti/dpll3xxx.c | 3 ++- >>> 1 file changed, 2 insertions(+), 1 deletion(-) >>> >>> diff --git a/drivers/clk/ti/dpll3xxx.c b/drivers/clk/ti/dpll3xxx.c >>> index f4dec00..7ed24bc 100644 >>> --- a/drivers/clk/ti/dpll3xxx.c >>> +++ b/drivers/clk/ti/dpll3xxx.c >>> @@ -437,7 +437,8 @@ int omap3_noncore_dpll_enable(struct clk_hw *hw) >>> >>> parent = clk_hw_get_parent(hw); >>> >>> - if (clk_hw_get_rate(hw) == clk_get_rate(dd->clk_bypass)) { >>> + if (clk_hw_get_rate(hw) == >>> + clk_hw_get_rate(__clk_get_hw(dd->clk_bypass))) { >>> WARN_ON(parent != __clk_get_hw(dd->clk_bypass)); >>> r = _omap3_noncore_dpll_bypass(clk); >>> } else { >>> >>