From: hdegoede@redhat.com (Hans de Goede)
To: linux-arm-kernel@lists.infradead.org
Subject: [linux-sunxi] Problem with Allwinner H3 clocks
Date: Fri, 29 Jan 2016 07:25:51 +0100 [thread overview]
Message-ID: <56AB05EF.2090604@redhat.com> (raw)
In-Reply-To: <20160128192931.GB32462@lukather>
Hi,
On 01/28/2016 08:29 PM, Maxime Ripard wrote:
> On Thu, Jan 28, 2016 at 05:59:18PM +0100, Jean-Francois Moine wrote:
<snip>
>> The A23/A33/H3 (and surely some other SoCs) documentations about
>> the peripheral/periph/periph0/periph1 PLLs say:
>>
>> Note: The PLL Output should be fixed to 600MHz, it is not
>> recommended to vary this value arbitrarily.
>
> I don't know if it's worth it at this point. The pll6 seems to work
> fine at other rates. Have you experienced any breakage when running at
> another frequency?
Hmm, are we actually changing the freq of pll6 on any SoCs? I know we've
the code to it, but given that it is shared between many pheripherals,
I assume we end up never changing it. I assume / hope that the clock
framework protects against reclocking a clock with multiple users ...
Regards,
Hans
next prev parent reply other threads:[~2016-01-29 6:25 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-27 7:46 Problem with Allwinner H3 clocks Jean-Francois Moine
2016-01-27 8:18 ` [linux-sunxi] " Chen-Yu Tsai
2016-01-27 9:37 ` Jean-Francois Moine
2016-01-27 14:36 ` Jens Kuske
2016-01-27 16:55 ` Jean-Francois Moine
2016-01-27 18:16 ` Hans de Goede
2016-01-27 19:02 ` Jean-Francois Moine
2016-01-28 8:15 ` Hans de Goede
2016-01-28 13:16 ` Jens Kuske
2016-01-28 16:59 ` Jean-Francois Moine
2016-01-28 19:29 ` Maxime Ripard
2016-01-29 6:25 ` Hans de Goede [this message]
2016-01-29 7:59 ` Chen-Yu Tsai
2016-02-01 6:37 ` Maxime Ripard
2016-02-01 14:26 ` Hans de Goede
2016-02-01 14:37 ` Chen-Yu Tsai
2016-02-01 14:45 ` Maxime Ripard
2016-02-01 14:47 ` Maxime Ripard
2016-01-29 7:27 ` Jean-Francois Moine
2016-01-28 15:51 ` Jean-Francois Moine
2016-01-28 17:31 ` Maxime Ripard
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