From: Zhi Wang <zhi.a.wang@intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>,
Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
intel-gfx@lists.freedesktop.org, igvt-g@lists.01.org,
kevin.tian@intel.com, zhiyuan.lv@intel.com, bing.niu@intel.com,
jike.song@intel.com, daniel.vetter@ffwll.ch,
david.j.cowperthwaite@intel.com
Subject: Re: [RFC 01/29] drm/i915/gvt: Introduce the basic architecture of GVT-g
Date: Wed, 03 Feb 2016 14:28:18 +0800 [thread overview]
Message-ID: <56B19E02.4040402@intel.com> (raw)
In-Reply-To: <20160129164807.GO24534@nuc-i3427.alporthouse.com>
Hi Chris:
Thanks for your feedback. :) Currently there are some host i915
changes we need to discussion, need your advice and feedback. For GVT
LRC context, as you see, we need it to do shadow context. All the
modifications of LRC are for it. Need inputs to think a better approach
or code placement. :)
---
The GGTT page table is shadowed in GVT-g. When guest writes the GTT
MMIOs, this write will be trapped by hypervisor, GVT-g will check if
it's a MMIO access which needs to be emulated, or a GGTT page table
entry which needs to be shadowed, then the shadowed GGTT page table
entry will be written into pGGTT page table. So that the mapping looks like:
From guest point of view:
guest PFN -> guest GGTT page table entry -> guest GGTT MMIO
The GVT-g shadow process looks like:
guest PFN -> guest GGTT page table entry -> GVT-g translated guest PFN
to machine PFN -> GVT-g writes the translated entry into physical GGTT MMIO.
---
The hypervisor_{read, write}_va() abstraction layer is to cover the
different approaches between hypervisors to let the host i915 to access
guest memory.
For example, guest writes the vELSP to submit a workload, then
hypervisor traps these writes and forward them to GVT-g core logic.
Actually, if GVT-g wants to access the guest context, only LRCA (GGTT
address) could be extracted from guest context descriptor.
First GVT-g will try to get the guest PFN from guest GGTT page table
(You can see the GGTT/PPGTT page table entry extraction routines in gtt.c),
Second GVT-g will try to get the host VA with the guest PFN via
hypervisor specific routines. (The function gvt_gma_to_va())
Then call hypervisor_{read,write}_va() to let hypervisor specific
routines to read/write the data from/to guest via hypervisor specific
routines.
This is a typical scenario of how GVT-g access a guest GGTT mapped
memory. For PPGTT, it becomes much more complicated.(Also in
gvt_gma_to_va())
On 01/30/16 00:48, Chris Wilson wrote:
> On Fri, Jan 29, 2016 at 03:57:09PM +0200, Joonas Lahtinen wrote:
>> Hi,
>>
>> TL;DR Overall, we have same problem as with the scheduler series, there
>> is too much placeholder stuff for easy review. Just squash enough code
>> into one commit so it actually does something logical that can be
>> reviewed and then extend it later. Then it can be reviewed and pushed.
>> Just splitting the code down to achieve smaller patches is not the
>> right thing to do.
>>
>> Comments on the overall code: You need to document all header file
>> functions (in the source files), and it is good to document the static
>> functions within a file too, to make future maintenance easier.
>>
>> It is not about splitting the code down to small chunks, but splitting
>> it down to small *logical* chunks. It doesn't make sense to commit
>> dozens of empty bodied functions for review, and then later add their
>> code.
>>
>> If you add functions, only add them at a patch that takes them into use
>> too, unless we're talking about general purpose shared code. And also
>> remember to add the function body and documentation header. If you
>> simply add a "return 0;" or similar function body, do add a comment to
>> why the function does not exist and when it will.
>>
>> Then, there is a trend of having a boolean return values in the code.
>> When possible, it should rather be int and the cause for failure should
>> be propagated from the last level all the way to up (-ENOMEN etc.).
>> This way debugging becomes easier and if new error conditions appear,
>> there is less of a maintenance burden to add the propagation later.
>>
>> Finally, make sure to look at the existing driver parts and
>> https://www.kernel.org/doc/Documentation/CodingStyle
>> for proper coding style. There are lots of whitespace fixes needed in
>> this series, like array initializations.
>>
>> I hope to see this first patch rerolled so that you squash some of the
>> later commits into it so that all functions have a body and you add
>> documentation for the functions so I can both see what it should do and
>> what it actually does. Only reroll the first patch, to keep the
>> iterative step smaller. Lets only then continue with the rest of the
>> series once we've reached a consensus on the formatting and style
>> basics.
>>
>> See more comments below.
>
> I'm glad you did the nitpicking. As far as the integration goes, on the
> whole I'm happy with the way it is structured and the reuse of existing
> code. I tried to attack various aspects of the GVT contexts and came to
> the conclusion I couldn't suggest a better approach (though maybe
> tomorrow!). A few bits and pieces I got lost trying to pull together
> (in particular like how we do is read back through the GTT entries
> performed, the hypervisor_read_va abstraction iirc) and would appreciate
> having a branch available to get the complete picture.
> -Chris
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2016-02-03 6:30 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-28 10:21 [RFC 00/29] iGVT-g implementation in i915 Zhi Wang
2016-01-28 10:21 ` [RFC 01/29] drm/i915/gvt: Introduce the basic architecture of GVT-g Zhi Wang
2016-01-29 13:57 ` Joonas Lahtinen
2016-01-29 16:48 ` Chris Wilson
2016-02-03 6:28 ` Zhi Wang [this message]
2016-02-05 7:02 ` Zhiyuan Lv
2016-02-03 6:01 ` Zhi Wang
2016-02-03 7:01 ` Zhiyuan Lv
2016-02-04 11:25 ` Joonas Lahtinen
2016-02-16 9:54 ` Zhi Wang
2016-02-16 12:44 ` Jani Nikula
2016-02-16 14:08 ` Joonas Lahtinen
2016-01-28 10:21 ` [RFC 02/29] drm/i915: Introduce host graphics memory balloon for gvt Zhi Wang
2016-02-04 11:27 ` Joonas Lahtinen
2016-02-05 10:03 ` Zhiyuan Lv
2016-02-05 13:40 ` Joonas Lahtinen
2016-02-05 14:16 ` Zhiyuan Lv
2016-02-08 11:52 ` Joonas Lahtinen
2016-02-10 8:08 ` Daniel Vetter
2016-01-28 10:21 ` [RFC 03/29] drm/i915: Introduce GVT context creation API Zhi Wang
2016-01-28 10:21 ` [RFC 04/29] drm/i915: Ondemand populate context addressing mode bit Zhi Wang
2016-01-28 10:21 ` [RFC 05/29] drm/i915: Do not populate PPGTT root pointers for GVT context Zhi Wang
2016-01-28 10:21 ` [RFC 06/29] drm/i915: Do not initialize the engine state of " Zhi Wang
2016-01-28 10:21 ` [RFC 07/29] drm/i915: GVT context scheduling Zhi Wang
2016-01-28 10:21 ` [RFC 08/29] drm/i915: Support vGPU guest framebuffer GEM object Zhi Wang
2016-01-28 10:21 ` [RFC 09/29] drm/i915: gvt: Resource allocator Zhi Wang
2016-01-28 10:21 ` [RFC 10/29] drm/i915: gvt: Basic mmio emulation state Zhi Wang
2016-01-28 10:21 ` [RFC 11/29] drm/i915: gvt: update PVINFO page definition in i915_vgpu.h Zhi Wang
2016-01-28 10:21 ` [RFC 12/29] drm/i915: gvt: vGPU life cycle management Zhi Wang
2016-01-28 10:21 ` [RFC 13/29] drm/i915: gvt: trace stub Zhi Wang
2016-01-28 10:21 ` [RFC 14/29] drm/i915: gvt: vGPU interrupt emulation framework Zhi Wang
2016-01-28 10:21 ` [RFC 15/29] drm/i915: gvt: vGPU graphics memory " Zhi Wang
2016-01-28 10:21 ` [RFC 16/29] drm/i915: gvt: Generic MPT framework Zhi Wang
2016-01-28 10:21 ` [RFC 17/29] gvt: Xen hypervisor GVT-g MPT module Zhi Wang
2016-01-28 11:33 ` Joonas Lahtinen
2016-01-28 12:50 ` Zhiyuan Lv
2016-01-28 10:21 ` [RFC 18/29] drm/i915: gvt: vGPU configuration emulation Zhi Wang
2016-01-28 10:21 ` [RFC 19/29] drm/i915: gvt: vGPU OpRegion emulation Zhi Wang
2016-01-28 10:21 ` [RFC 20/29] drm/i915: gvt: vGPU framebuffer format decoder Zhi Wang
2016-01-28 10:21 ` [RFC 21/29] drm/i915: gvt: vGPU MMIO register emulation Zhi Wang
2016-01-28 10:21 ` [RFC 22/29] drm/i915: gvt: Full display virtualization Zhi Wang
2016-01-28 10:21 ` [RFC 23/29] drm/i915: gvt: Introduce GVT control interface Zhi Wang
2016-01-28 10:21 ` [RFC 24/29] drm/i915: gvt: Full execlist status emulation Zhi Wang
2016-01-28 10:21 ` [RFC 25/29] drm/i915: gvt: vGPU execlist workload submission Zhi Wang
2016-01-28 10:21 ` [RFC 26/29] drm/i915: gvt: workload scheduler Zhi Wang
2016-01-28 10:21 ` [RFC 27/29] drm/i915: gvt: vGPU schedule policy framework Zhi Wang
2016-01-28 10:21 ` [RFC 28/29] drm/i915: gvt: vGPU context switch Zhi Wang
2016-01-28 10:21 ` [RFC 29/29] drm/i915: gvt: vGPU command scanner Zhi Wang
2016-01-28 17:15 ` ✗ Fi.CI.BAT: failure for iGVT-g implementation in i915 Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=56B19E02.4040402@intel.com \
--to=zhi.a.wang@intel.com \
--cc=bing.niu@intel.com \
--cc=chris@chris-wilson.co.uk \
--cc=daniel.vetter@ffwll.ch \
--cc=david.j.cowperthwaite@intel.com \
--cc=igvt-g@lists.01.org \
--cc=intel-gfx@lists.freedesktop.org \
--cc=jike.song@intel.com \
--cc=joonas.lahtinen@linux.intel.com \
--cc=kevin.tian@intel.com \
--cc=zhiyuan.lv@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.