From: David Vrabel <david.vrabel@citrix.com>
To: Stefano Stabellini <stefano.stabellini@eu.citrix.com>,
Andrew Cooper <andrew.cooper3@citrix.com>
Cc: "Wei Liu" <wei.liu2@citrix.com>, "Tim Deegan" <tim@xen.org>,
"Paul Durrant" <paul.durrant@citrix.com>,
"David Vrabel" <david.vrabel@citrix.com>,
"Jan Beulich" <JBeulich@suse.com>,
xen-devel <xen-devel@lists.xenproject.org>,
samuel.thibault@ens-lyon.org,
"Boris Ostrovsky" <boris.ostrovsky@oracle.com>,
"Roger Pau Monné" <roger.pau@citrix.com>
Subject: Re: HVMlite ABI specification DRAFT A
Date: Mon, 8 Feb 2016 13:21:22 +0000 [thread overview]
Message-ID: <56B89652.5080805@citrix.com> (raw)
In-Reply-To: <alpine.DEB.2.02.1602081207310.27008@kaball.uk.xensource.com>
On 08/02/16 12:10, Stefano Stabellini wrote:
> On Fri, 5 Feb 2016, Andrew Cooper wrote:
>> The current pci-front/back and Qemu-based methods have substantial
>> architectural deficiencies, and are incredibly fragile to change. When
>> was the last XSA to PCI Passthrough which didn't end up requiring
>> further bugfixes to undo the collateral damage?
>
> What's the problem with the pcifront/pciback model exactly (aside from
> being tied to pirqs, but we already had a plan to fix that so that we
> could use them on ARM, where we always have a GIC interrupt controller)?
The most obvious is that it doesn't work for dom0.
David
prev parent reply other threads:[~2016-02-08 13:21 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-04 17:48 HVMlite ABI specification DRAFT A Roger Pau Monné
2016-02-04 18:22 ` Andrew Cooper
2016-02-04 19:33 ` Roger Pau Monné
2016-02-04 20:24 ` Boris Ostrovsky
2016-02-05 14:44 ` Ian Campbell
2016-02-05 14:46 ` Roger Pau Monné
2016-02-05 9:12 ` Jan Beulich
2016-02-05 9:50 ` Roger Pau Monné
2016-02-05 10:40 ` Jan Beulich
2016-02-05 11:04 ` Andrew Cooper
2016-02-05 11:07 ` Jan Beulich
2016-02-05 11:30 ` Roger Pau Monné
2016-02-05 11:45 ` Jan Beulich
2016-02-05 11:50 ` Roger Pau Monné
2016-02-05 13:22 ` Jan Beulich
2016-02-05 14:27 ` Roger Pau Monné
2016-02-05 14:31 ` Jan Beulich
2016-02-05 15:00 ` Roger Pau Monné
2016-02-05 15:29 ` Jan Beulich
2016-02-05 15:35 ` Roger Pau Monné
2016-02-04 18:38 ` Boris Ostrovsky
2016-02-04 18:51 ` Samuel Thibault
2016-02-04 19:21 ` Roger Pau Monné
2016-02-04 20:17 ` Boris Ostrovsky
2016-02-04 20:29 ` Konrad Rzeszutek Wilk
2016-02-04 20:37 ` Andrew Cooper
2016-02-05 8:23 ` Roger Pau Monné
2016-02-04 22:23 ` Samuel Thibault
2016-02-04 19:09 ` Samuel Thibault
2016-02-04 19:18 ` Boris Ostrovsky
2016-02-04 22:21 ` Samuel Thibault
2016-02-04 22:25 ` Andrew Cooper
2016-02-04 22:41 ` Samuel Thibault
2016-02-05 10:20 ` Ian Campbell
2016-02-05 16:01 ` Tim Deegan
2016-02-05 16:13 ` Roger Pau Monné
2016-02-05 17:14 ` Andrew Cooper
2016-02-05 18:05 ` Tim Deegan
2016-02-05 18:44 ` Andrew Cooper
2016-02-08 12:10 ` Stefano Stabellini
2016-02-08 13:21 ` David Vrabel [this message]
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