From: Joao Pinto <Joao.Pinto@synopsys.com>
To: Arnd Bergmann <arnd@arndb.de>, Joao Pinto <Joao.Pinto@synopsys.com>
Cc: Bjorn Helgaas <helgaas@kernel.org>, <linux-pci@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <CARLOS.PALMINHA@synopsys.com>
Subject: Re: [PATCH] link up validation moved to pcie-designware
Date: Mon, 8 Feb 2016 16:48:07 +0000 [thread overview]
Message-ID: <56B8C6C7.9060105@synopsys.com> (raw)
In-Reply-To: <2817924.61jZWIvqjt@wuerfel>
Our
On 2/8/2016 4:46 PM, Arnd Bergmann wrote:
> On Monday 08 February 2016 16:43:33 Joao Pinto wrote:
>> Hi,
>> Ok, so what should be the retries and waiting time in your opinion?
>> The most typical is:
>>
>> retries: 10
>> delay: 100ms (usleep_range (90000, 100000))
>>
>> These values should be ok?
>>
>> I am already testing a full pcie-designware platform driver.
>>
>>
> You are the one with the datasheet, not me. ;-)
Our reference driver follows the 10x with 100ms delay between retries, so lets
follow that value. Agree?
>
> Arnd
>
Joao
next prev parent reply other threads:[~2016-02-08 16:48 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-08 12:43 [PATCH] link up validation moved to pcie-designware Joao Pinto
2016-02-08 13:03 ` Gabriele Paoloni
2016-02-08 15:12 ` Joao Pinto
2016-02-08 15:29 ` Gabriele Paoloni
2016-02-08 15:30 ` Joao Pinto
2016-02-25 16:28 ` Bjorn Helgaas
2016-02-08 16:40 ` Arnd Bergmann
2016-02-08 16:41 ` Bjorn Helgaas
2016-02-08 16:43 ` Joao Pinto
2016-02-08 16:46 ` Arnd Bergmann
2016-02-08 16:48 ` Joao Pinto [this message]
2016-02-09 15:28 ` Arnd Bergmann
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