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From: Richard Henderson <rth@twiddle.net>
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Date: Wed, 10 Feb 2016 04:16:21 +1100
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Subject: Re: [Qemu-devel] [PATCH 02/15] tcg-mips: Support 64-bit opcodes
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To: James Hogan <james.hogan@imgtec.com>
Cc: qemu-devel@nongnu.org, aurelien@aurel32.net

On 02/10/2016 02:24 AM, James Hogan wrote:
> Missing op definition for mulu2_i64
> Missing op definition for muls2_i64
> /work/mips/qemu/main/tcg/tcg.c:1253: tcg fatal error
>
> It gets further (to the point of seg faulting - looking into it) with
> this fixup:
>
> diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h
> index 374d80374021..fa9cd4ab296a 100644
> --- a/tcg/mips/tcg-target.h
> +++ b/tcg/mips/tcg-target.h
> @@ -145,8 +145,8 @@ extern bool use_mips32r2_instructions;
>   #define TCG_TARGET_HAS_nand_i64         0
>   #define TCG_TARGET_HAS_add2_i64         0
>   #define TCG_TARGET_HAS_sub2_i64         0
> -#define TCG_TARGET_HAS_mulu2_i64        1
> -#define TCG_TARGET_HAS_muls2_i64        1
> +#define TCG_TARGET_HAS_mulu2_i64        (!use_mips32r6_instructions)
> +#define TCG_TARGET_HAS_muls2_i64        (!use_mips32r6_instructions)

Oops, yep.


r~