From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53440) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aVQ89-0003oK-Dd for qemu-devel@nongnu.org; Mon, 15 Feb 2016 15:52:26 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aVQ85-0006vh-DD for qemu-devel@nongnu.org; Mon, 15 Feb 2016 15:52:25 -0500 Received: from mail-qk0-x242.google.com ([2607:f8b0:400d:c09::242]:34570) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aVQ85-0006vd-8x for qemu-devel@nongnu.org; Mon, 15 Feb 2016 15:52:21 -0500 Received: by mail-qk0-x242.google.com with SMTP id u128so5720554qkh.1 for ; Mon, 15 Feb 2016 12:52:21 -0800 (PST) Sender: Richard Henderson References: <1455541846-19126-1-git-send-email-kbastian@mail.uni-paderborn.de> <1455541846-19126-2-git-send-email-kbastian@mail.uni-paderborn.de> From: Richard Henderson Message-ID: <56C23A7E.3090706@twiddle.net> Date: Tue, 16 Feb 2016 07:52:14 +1100 MIME-Version: 1.0 In-Reply-To: <1455541846-19126-2-git-send-email-kbastian@mail.uni-paderborn.de> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v2 1/4] target-tricore: Add trap handling List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Bastian Koppelmann , qemu-devel@nongnu.org On 02/16/2016 12:10 AM, Bastian Koppelmann wrote: > + > +void tricore_cpu_do_interrupt(CPUState *cs) > +{ > + TriCoreCPU *cpu = TRICORE_CPU(cs); > + CPUTriCoreState *env = &cpu->env; > + > + if (cs->exception_index <= TRAPC_NMI) { > + /* The trap vector table is accessed to fetch the first instruction of > + the trap handler. */ > + env->PC = env->BTV | (cs->exception_index << 5); > + } else if (cs->exception_index == TRAPC_IRQ) { > + /* The interrupt vector table is accessed to fetch the first instruction > + of the interrupt handler. */ > + env->PC = env->BIV | ((env->ICR & MASK_ICR_PIPN) >> 10); > + } > +} You've still got a path whereby you modify PC without saving the old one. I don't think you want to add the do_interrupt hook at all until you're ready to do real async interrupts. > + /* PCXI.PCPN = ICR.CCPN */ > + env->PCXI = (env->PCXI & 0xffffff) + > + ((env->ICR & MASK_ICR_CCPN) << 24); > + cs->exception_index = class; > + cpu_loop_exit(cs); > +} > + There's no reason you can't modify PC here at the end of raise_exception_sync_internal. If you omit the set of exception_index here, you'll simply exit the cpu loop and immediately re-enter it at the new PC, without having to go through the do_interrupt hook. r~