From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47933) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aW83L-0007pH-Re for qemu-devel@nongnu.org; Wed, 17 Feb 2016 14:46:24 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aW83I-00048M-MW for qemu-devel@nongnu.org; Wed, 17 Feb 2016 14:46:23 -0500 Received: from mail-wm0-x233.google.com ([2a00:1450:400c:c09::233]:37465) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aW83I-00048F-Cc for qemu-devel@nongnu.org; Wed, 17 Feb 2016 14:46:20 -0500 Received: by mail-wm0-x233.google.com with SMTP id g62so43698130wme.0 for ; Wed, 17 Feb 2016 11:46:20 -0800 (PST) Sender: Paolo Bonzini References: <1455704742-21171-1-git-send-email-peterx@redhat.com> <1455704742-21171-3-git-send-email-peterx@redhat.com> From: Paolo Bonzini Message-ID: <56C4CE0A.4070501@redhat.com> Date: Wed, 17 Feb 2016 20:46:18 +0100 MIME-Version: 1.0 In-Reply-To: <1455704742-21171-3-git-send-email-peterx@redhat.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [RFC PATCH 2/2] pci: add PCIIOMMUOps and PCIIOMMUIntRemapFunc List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Xu , qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, jasowang@redhat.com, mst@redhat.com On 17/02/2016 11:25, Peter Xu wrote: > This patch extended the current PCI IOMMU functions into operation list, > one new op is added to do interrupt remapping. > > Currently it is not working since int_remap is always NULL. It only > provide a interface to extend PCI MSI to support interrupt remapping in > the future. > > One helper function pci_setup_iommu_ops() is introduced. We can use this > instead of the origin pci_setup_iommu() one to extend interrupt > remapping on specific platform. For MSI, I think interrupt remapping can be done directly in the IOMMU MemoryRegion. You can just overlay a new MemoryRegion on top of the IOMMU region where MSIs are sent (that's around 0xFEE00000, I don't remember where exactly). It will catch interrupts sent by the device, remap them and forward them to the right interrupt destination in the host. I'm not sure about INTX interrupts, but I think that the host kernel remaps them simply by virtualizing the IOAPIC's redirection table. Paolo